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IC Design for Implantable Devices Treating Epilepsy

IC Design for Implantable Devices Treating Epilepsy
by Daniel Payne on 06-09-2013 at 8:05 pm

I’m utterly amazed at how IC-based products are improving our quality of life by implantable devices. The modern day pacemaker has given people added years of life by electrically stimulating the heart. A privately-held company called NeuroPace was founded in Mountain View, California to treat epilepsy by using responsive… Read More


Transistor, Gate and RTL Debug Update at DAC

Transistor, Gate and RTL Debug Update at DAC
by Daniel Payne on 05-29-2013 at 10:53 am

Debugging an IC design at the transistor, Gate and RTL levels is often necessary to meet timing requirements and understand analog or digital behavior, yet the process itself can be a tedious one, filled with manual steps, therefore making it an error-prone process. EDA tools have been created to help us graphically debug transistor,… Read More


Circuit Analysis & Debugging

Circuit Analysis & Debugging
by Daniel Payne on 03-30-2013 at 3:18 pm

Spice Debugger

In EDA we often talk about how fast a SPICE circuit simulator is, or about capacity and accuracy compared to silicon measurements. Yes, speed, capacity and accuracy are important, however when talking to actual transistor-level circuit designers you discover something quite different, most of their time is spent doing debugging,… Read More


Visual Debugging at Altera on Billion-Transistor Chips

Visual Debugging at Altera on Billion-Transistor Chips
by Daniel Payne on 03-15-2013 at 10:38 am

My first job out of college was doing transistor-level circuit design, so I’m always curious about how companies are doing billion-transistor chip design and debug these days at the FPGA companies.

I spoke with Yaron Kretchmer,he works at Altera and manages the engineering infrastructure group where they have a compute… Read More


Visually Debugging IC Designs for AMS and Mixed-Languages

Visually Debugging IC Designs for AMS and Mixed-Languages
by Daniel Payne on 03-12-2013 at 4:18 pm

With an HDL-based design methodology many IC engineers code in text languages like SystemVerilog and VHDL, so it’s only natural to use a text-based debug methodology. The expression that, “A picture is worth a thousand words” comes to my mind and in this case a visual debug approach is worth considering for … Read More