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Thermal Reliability Challenges in Automotive and Data Center Applications – A Xilinx Perspective

Thermal Reliability Challenges in Automotive and Data Center Applications – A Xilinx Perspective
by Bernard Murphy on 02-13-2020 at 6:00 am

thermometer

I wrote recently on ANSYS and TSMC’s joint work on thermal reliability workflows, as these become much more important in advanced processes and packaging. Xilinx provided their own perspective on thermal reliability analysis for their unquestionably large systems – SoC, memory, SERDES and high-speed I/O – stacked within a … Read More


De-Risking High-Speed RF Designs from Electromagnetic Crosstalk Issue

De-Risking High-Speed RF Designs from Electromagnetic Crosstalk Issue
by Mike Gianfagna on 02-12-2020 at 6:00 am

Picture3 1

At DesignCon 2020, ANSYS sponsored a series of very high-quality presentations.  Some focused on advanced methods and new technology exploration and some provided head-on, practical and actionable capabilities to improve advanced designs. The presentation I will discuss here falls into the latter category. The topic was… Read More


Emerging Requirements for Electromagnetic Crosstalk Analysis

Emerging Requirements for Electromagnetic Crosstalk Analysis
by Tom Dillinger on 02-10-2020 at 10:00 am

EM coupling wire segments

This article will describe the motivations for pursuing a new flow in the SoC design methodology.  This flow involves the extraction, evaluation, and analysis of a full electromagnetic coupling model for a complex SoC and its package environment.  The results of this analysis highlight the impact of electromagnetic coupling… Read More


ANSYS, TSMC Document Thermal Reliability Guidelines

ANSYS, TSMC Document Thermal Reliability Guidelines
by Bernard Murphy on 01-01-2020 at 6:00 am

Automotive Reliability Guide min

Advanced IC technologies, 5nm and 7nm FinFET design and stacked packaging, are enabling massive levels of integration of super-fast circuits. These in turn enable much of the exciting new technology we hear so much about: mobile gaming and ultra-high definition mobile video through enhanced mobile broadband in 5G, which requires… Read More


Package Reliability Issues Cost Money

Package Reliability Issues Cost Money
by Tom Dillinger on 11-13-2019 at 6:00 am

Advanced packaging technology is enabling “More Than Moore” scaling of heterogeneous technology die.  At the recent EDPS Symposium in Milpitas, Craig Hillman, Director of Product Development, DfR Solutions, at ANSYS gave a compelling presentation, “Reliability Challenges in Advanced Packaging”.  The key takeaway messages… Read More


5G Deployments – The Analysis Requirements are Ginormous

5G Deployments – The Analysis Requirements are Ginormous
by Tom Dillinger on 10-07-2019 at 10:00 am

The introduction of 5G communications support offers tremendous potential across a broad spectrum of applications (no pun intended).  5G is indeed quite encompassing, across a wide range of frequencies – the figure below illustrates the common terminology used, from low-band, mid-band (“sub 6G”), and high-band (“mmWave… Read More


Xilinx on ANSYS Elastic Compute for Timing and EM/IR

Xilinx on ANSYS Elastic Compute for Timing and EM/IR
by Bernard Murphy on 08-20-2019 at 5:00 am

RedHawk-SC

I’m a fan of getting customer reality checks on advanced design technologies. This is not so much because vendors put the best possible spin on their product capabilities; of course they do (within reason), as does every other company aiming to stay in business. But application by customers on real designs often shows lower performance,… Read More


Getting to EMC Compliance by Design

Getting to EMC Compliance by Design
by Bernard Murphy on 05-15-2019 at 7:00 am

At the risk of highlighting my abundant lack of expertise in the domain, I had always viewed EMC (electromagnetic compatibility) compliance and testing as one of those back-end exercises that can only be done on the real device and depends on a combination of expertise and brute-force in chip/package/module/system design (decaps,… Read More


Achieving a Predictable SignOff in 7nm

Achieving a Predictable SignOff in 7nm
by Alex Tan on 05-14-2019 at 12:00 pm

Designing with advanced-nodes FinFETs such as 7nm node involves a more complex process than prior nodes. As secondary physical effects are no longer negligible, the traditional margin-based approach applied at various design abstraction levels is considered ineffective. Coupled with the increase of device counts, failing… Read More


Webinar: Addressing Multiphysics Challenges in 7nm FinFET Designs

Webinar: Addressing Multiphysics Challenges in 7nm FinFET Designs
by Daniel Nenni on 03-12-2019 at 7:00 am

EDA is big on growth through acquisition, being acquired many times throughout my career I know this by experience. In fact, we have a wiki that tracks EDA Mergers and Acquisitions and it is the most viewed wiki on SemiWiki.com with 101,918 views thus far.

In March of 2017 ANSYS acquired CLK Design Automation which did timing variation… Read More