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Electrical Rule Checking and Exhaustive Classification of Errors

Electrical Rule Checking and Exhaustive Classification of Errors
by Daniel Payne on 04-16-2024 at 10:00 am

Aniah tool flow min

The goal of SoC design teams is to tape-out their project and receive working silicon on the first try, without discovering any bugs in silicon. To achieve this lofty goal requires all types of specialized checking and verification during the design phase to prevent bugs. There are checks at the system level, RTL level, gate level,… Read More


CEO Interview: Vincent Bligny of Aniah

CEO Interview: Vincent Bligny of Aniah
by Daniel Nenni on 02-09-2024 at 6:00 am

Imge 2

Vincent Bligny is a renowned expert in mixed-signal verification, particularly with transistor-level formal techniques. He spent 15 years in this industry, mainly within STMicroelectronics’ design and verification teams, allowing him to understand the challenges and opportunities of the EDA field.

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