Caspia’s advanced tools and agents blend seamlessly with existing design flows to add expert-level security verification capabilities for all design teams. Founded in 2020 and headquartered in Gainesville, Florida, Caspia brings together expertise in chip design, fabrication, test, and verification with a deep understanding… Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late
Chip-level vulnerability is becoming an existential threat for virtually all systems. The time to ensure your chip designs are resistant to these attacks is now. Caspia presented a webinar recently that provides important information on how to build attack-resistant chips. If you missed it, don’t worry. A replay link is coming.… Read More
Podcast EP350: The Growing Threat of Hardware Security Breaches and What to do About it with Dr. Andreas Kuehlmann
Daniel is joined by Dr. Andreas Kuehlmann, General Manager of Security Solutions at Arteris. He has over 35 years of experience in semiconductor design, software, and cybersecurity, including roles at IBM Research, UC Berkeley, Cadence, and Synopsys. Previously, he was CEO of Cycuity, which was acquired by Arteris.
Dan explores… Read More
WEBINAR: Caspia’s AI Makes You a Security Verification Expert
Let’s face it, powerful, highly trained AI is making it easier to find security flaws in many systems. When the attack surface becomes the underlying hardware, the risks grow exponentially. Unlike software, hardware can’t easily be “patched”. Early, advanced security verification is the way to mitigate these risks, but doing… Read More
Podcast EP347: Agentic Workflows from Caspia Technologies for Advanced Chip Security Verification with Stuart Audley
Daniel is joined by Stuart Audley, vice president and general manager of product management at Caspia Technologies, where he focuses on agentic security workflows. He has decades of experience designing and deploying cryptographic hardware and security IP for top defense and leading semiconductor companies. He previously… Read More
PQShield unveils ultra-small PQC embedded security breakthroughs at Embedded World 2026
As the threat of quantum computing to modern cybersecurity becomes increasingly real, the technology industry is accelerating efforts to develop cryptographic systems capable of resisting quantum attacks. One of the most significant developments in this field was presented at Embedded World 2026 in Nuremberg, Germany, … Read More
Effective Defense Against Hacks at the Edge
IoT permeates every aspect of our lives, in payment systems, access authorization, vehicles, utilities, factories, hospitals, and in so many other fields. Which makes these systems attractive targets for hacking and social disruption while also challenging to protect given the highly constrained resources that many such… Read More
Capability Hardware Enhanced RISC Instructions CHERI Alliance
The CHERI Alliance is a non-profit organization dedicated to accelerating the global adoption of CHERI (Capability Hardware Enhanced RISC Instructions), a technology designed to improve computer security at the hardware level. Established as an independent entity, the Alliance brings together industry leaders, researchers,… Read More
CHERI: Hardware-Enforced Capability Architecture for Systematic Memory Safety
The rapid escalation of cyberattacks over the past two decades has exposed a fundamental weakness at the core of modern computing systems: the lack of memory safety. Industry data consistently shows that the majority of critical software vulnerabilities stem from memory corruption issues such as buffer overflows, use-after-free… Read More
Securing RISC-V Third-Party IP: Enabling Comprehensive CWE-Based Assurance Across the Design Supply Chain
by Jagadish Nayak
RISC-V adoption continues to accelerate across commercial and government microelectronics programs. Whether open-source or commercially licensed, most RISC-V processor cores are integrated as third-party IP (3PIP), potentially introducing supply chain security challenges that demand structured,… Read More


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