All Things Semiconductor!
Synopsys Low Power Workshop Offers Breadth and DepthSynopsys seems to particularly excel at these events,…Read More
An Update from Joe Sawicki @ Mentor, a Siemens Business 56thDACExecutives from the major EDA companies attend the…Read More
Considering SiFive: What Should I Get to Implement a RISC-V Core?I have an old weathered leather-clad black notebook…Read More
Google Trustworthy Response to Product Vulnerabilities Demonstrates LeadershipI applaud Google for taking extraordinary steps to…Read More
The electrostatic discharge that occurs in lightening, as seen in the picture below, can cause serious damage to the objects on the ground. Over centuries mankind has devised ways, such as lighting rods and arresters, to deflect the energy so it is dissipated harmlessly. The same drama plays out on modern semiconductors due to … Read More
If you practice in advanced levels of power management, you know about dynamic voltage and frequency scaling (DVFS). This is where you allow some part of a circuit, say a CPU, to run at different voltages and frequencies depending on acceptable performance versus thermal tradeoffs and battery life on a mobile device. Need to run… Read More
Advanced IC packaging, such as fan-out WLP (Wafer Level Packaging) and 2.5D TSV (Through Silicon Via) will drive the packaging equipment market, particularly lithography. This will help specific equipment manufacturers in 2019, since the WFE (Wafer Front End) market will drop 17%. But the Back-End lithography market, led … Read More
The “20 Questions with John East” series continues
From time to time I present the History of Silicon Valley as I saw it to various audiences. I always enjoy doing that. I’ve learned that the part that audiences like the most is the Apple / Steve Jobs story. That’s not hard to understand. Steve Jobs was truly fascinating! The story… Read More
I recently wrote about The Implications of the Rise of AI/ML in the Cloud. In that article, I wrote about my expectation that the rapidly growing AI market will lead to the accelerated use of high-level synthesis (HLS), prototyping, and emulation. In this article, I will focus on the prototyping portion of that – specifically FPGA… Read More
It was inevitable that EDA applications would meet the cloud. EDA has a long history of creating some of the most daunting compute challenges. This arises from employing current generation chips to design the next generation chips. Despite growing design complexity, many tools have kept pace and even reduced runtimes from generation… Read More
Arm is a machine. They crank out new products in a wide range of categories, Project Trillium for AI, Neoverse for infrastructure, their Automotive Enhanced line and the Pelion IoT platform. And in each they have a regular beat of new product introductions following roadmaps they have already laid out. Not that you’d expect any … Read More
The emergence of 3D packaging technology has been accompanied by the term “more than Moore”, to reflect the increase in areal circuit density at a rate that exceeds the traditional IC scaling pace associated with Moore’s Law. At the recent Design Automation Conference in Las Vegas, numerous exhibits on the vendor floor presented… Read More
Four experts in the discipline of functional safety were gathered together at #56DAC in Vegas earlier in June, hosted at the Mentor booth, so I rested my legs and typed notes as fast as I could. The product areas that I first think about when functional safety (FuSa) comes up are automotive, medical and aerospace, because keeping… Read More
SEMICON West and ES Design West are right around the corner here in San Francisco and I wanted to point out the Meet the Experts segment in the appropriately named Meet the Experts Theater. Great idea really and a super great line-up. The best part of course is actually meeting the experts. Over my 35 year semiconductor career I have… Read More
