WP_Query Object
(
[query] => Array
(
)
[query_vars] => Array
(
[error] =>
[m] =>
[p] => 0
[post_parent] =>
[subpost] =>
[subpost_id] =>
[attachment] =>
[attachment_id] => 0
[name] =>
[pagename] =>
[page_id] => 0
[second] =>
[minute] =>
[hour] =>
[day] => 0
[monthnum] => 0
[year] => 0
[w] => 0
[category_name] =>
[tag] =>
[cat] =>
[tag_id] =>
[author] =>
[author_name] =>
[feed] =>
[tb] =>
[paged] => 0
[meta_key] =>
[meta_value] =>
[preview] =>
[s] =>
[sentence] =>
[title] =>
[fields] =>
[menu_order] =>
[embed] =>
[category__in] => Array
(
)
[category__not_in] => Array
(
)
[category__and] => Array
(
)
[post__in] => Array
(
)
[post__not_in] => Array
(
)
[post_name__in] => Array
(
)
[tag__in] => Array
(
)
[tag__not_in] => Array
(
)
[tag__and] => Array
(
)
[tag_slug__in] => Array
(
)
[tag_slug__and] => Array
(
)
[post_parent__in] => Array
(
)
[post_parent__not_in] => Array
(
)
[author__in] => Array
(
)
[author__not_in] => Array
(
)
[ignore_sticky_posts] =>
[suppress_filters] =>
[cache_results] =>
[update_post_term_cache] => 1
[lazy_load_term_meta] => 1
[update_post_meta_cache] => 1
[post_type] =>
[posts_per_page] => 10
[nopaging] =>
[comments_per_page] => 50
[no_found_rows] =>
[order] => DESC
)
[tax_query] => WP_Tax_Query Object
(
[queries] => Array
(
)
[relation] => AND
[table_aliases:protected] => Array
(
)
[queried_terms] => Array
(
)
[primary_table] => wp5_posts
[primary_id_column] => ID
)
[meta_query] => WP_Meta_Query Object
(
[queries] => Array
(
)
[relation] =>
[meta_table] =>
[meta_id_column] =>
[primary_table] =>
[primary_id_column] =>
[table_aliases:protected] => Array
(
)
[clauses:protected] => Array
(
)
[has_or_relation:protected] =>
)
[date_query] =>
[queried_object] =>
[queried_object_id] =>
[request] => SELECT SQL_CALC_FOUND_ROWS wp5_posts.ID FROM wp5_posts WHERE 1=1 AND wp5_posts.post_type = 'post' AND (wp5_posts.post_status = 'publish' OR wp5_posts.post_status = 'expired' OR wp5_posts.post_status = 'tribe-ea-success' OR wp5_posts.post_status = 'tribe-ea-failed' OR wp5_posts.post_status = 'tribe-ea-schedule' OR wp5_posts.post_status = 'tribe-ea-pending' OR wp5_posts.post_status = 'tribe-ea-draft') ORDER BY wp5_posts.post_date DESC LIMIT 0, 10
[posts] => Array
(
[0] => WP_Post Object
(
[ID] => 284053
[post_author] => 11830
[post_date] => 2020-04-03 06:00:03
[post_date_gmt] => 2020-04-03 13:00:03
[post_content] => I concluded my last post on the topic with an inventory of the key attributes needed to fill the ASIC void created by the relentless consolidation in semiconductors. There were five items, as follows:
- Design and manufacturing expertise in a market that requires custom chips
- Differentiating IP and the skills to integrate it into a customer’s design
- A solid design methodology and the discipline to enforce it
- A willingness to partner with the customer – a shared vision for success is key
- A solid track record of successful bring-up of designs in target systems
I also mentioned Presto Engineering and their acquisition of DELTA Microelectronics. What does that combination do for the ASIC ecosystem? How does this company fit? I took a look at Presto through the lens provided by the list, above. Here’s what I found…
If you visit the Presto Engineering website, you’re greeted with “Your Trusted Microelectronics Partner”. That sounded like the sentiments of point 4, above. Probing a bit more, I found an informative, under two-minute video on Presto’s OCEAN Platform.
OCEAN is a rather sophisticated web-based system that manages all phases of chip logistics tracking and development, from tapeout to volume manufacturing. Full transparency, proactive management and risk-reduction. I encourage you to watch this video if you have a couple of minutes. This is sounding a lot like point 4. You can also learn more about Presto’s supply chain management capabilities here. In my travels through the Presto website, I found a combination of capabilities from both Presto and DELTA. It appears that they are keeping the DELTA brand. The combined offering provided some very helpful perspectives.
Let’s circle back to point 1. You can find good information about IoT and security applications on Presto’s website. These are both markets that clearly need custom silicon. There is also a pedigree in RF and mixed-signal solutions at Presto. This expertise allows them to offer sensor capabilities for IoT, in addition to low-power design and wireless communications, key ingredients for this market. You will also find expertise on contactless payment cards. This technology utilizes near-field communication (NFC), energy harvesting and security, all areas that need custom silicon and are growing rapidly. Another high-growth area is automotive and autonomous driving. Presto also participates here, both in terms of advanced testing to support automotive qualification and sensor technology for autonomous driving, I would say point 1 is well covered.
Probing on point 2, I found relevant digital and analog IP. Everything from processor cores, DES/triple DES processors and LVDS I/Os to PLLs, data converters, sensors, battery monitors and more. These all tie back to the ASIC design services provided by Presto, through DELTA. Point 2 appears to be covered as well.
On to point 3, design methodology. There’s a lot to say here. The site talks about a rigorous specification process, supported by proven IP, design reviews and careful verification and testability planning throughout. I know all these items are quite important to a successful project and I was glad to see this discussion. The methodology doesn’t stop at design, also a good thing. Foundry management, parametric, functional and life test, packaging, DFT and inventory management are discussed as well. The OCEAN Platform video also talks about these activities. Point 3 appears to be covered.
We already discussed point 4, leaving point 5, bring-up track record. You will find discussions on the Presto website about operating life and stress testing (HTOL/HAST for those who like acronyms). Custom hardware and extensive test facilities are needed for these critical bring-up tasks. They are covered. You can view a series of customer success stories here.
Stacking up points 1-5 indicates to me the new, combined Presto/DELTA organization checks the boxes as a focused ASIC supplier contender. The industry needs more dedicated ASIC suppliers – it’s good for emerging businesses and the semiconductor industry in general. Presto Engineering and DELTA Microelectronics are both based in Europe, France and Denmark respectively. The combined company does offer a global footprint from a sales and support point of view.
In the press release announcing the DELTA acquisition, Michel Villemain, the CEO of Presto Engineering said, “This acquisition allows us to expand our business and provide industrial and semiconductor companies with a consolidated European partner that offers ASIC design, test, qualification and manufacturing expertise.” It will be interesting to watch Presto as they build ASIC momentum.
[post_title] => Filling the ASIC Void – Part 2
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => filling-the-asic-void-part-2
[to_ping] =>
[pinged] =>
[post_modified] => 2020-04-02 17:39:28
[post_modified_gmt] => 2020-04-03 00:39:28
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284053
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 0
[filter] => raw
)
[1] => WP_Post Object
(
[ID] => 284309
[post_author] => 16
[post_date] => 2020-04-02 06:00:30
[post_date_gmt] => 2020-04-02 13:00:30
[post_content] => The irony around this topic in the middle of the coronavirus scare – when more of us are working remotely through the cloud – is not lost on me. Nevertheless, ingrained beliefs move slowly so it’s still worth shedding further light. There is a tribal wisdom among chip designers that what we do demands much higher security than any other conceivable activity and can only be handled safely in our in-company datacenter.
At one time, this demand was reasonable. In-house IT/IS worked hard to limit access, hackers weren’t too sophisticated and nation/state hacking wasn’t a thing (as far as we knew). But when it comes to security, cloud capabilities have been racing ahead and your IT/IS group, with the best will in the world, is hopelessly outmatched. If you work for the NSA or CIA on air-gapped systems you may still be more secure, otherwise we might want to revisit those cherished beliefs.
Sometimes our beliefs are so ingrained they defy reason. Dan Ganousis (VP sales and marketing at Metrics) told me he recently talked to three design verification teams at one of the largest cloud providers, who told him that they could never put their IP in the cloud because it isn’t sufficiently secure. Seriously? They work for one of the largest cloud services providers in the world. Everyone else is moving to the cloud – retail, banks, financial services, trading, legal services, medical records, the DoD. But design IP supposedly requires higher security than those do? And it’s OK that they as employees of that provider don’t trust that security but everyone else should?
That one’s good for a laugh but there are more serious reasons we need to wake up and smell the coffee. One is simply engineering horsepower. Who is going to build more secure datacenters, a trillion-dollar company with a cloud service business as a major component of its revenue or a much smaller company in which IT/IS is a small component of cost, not even revenue? Sure, the cloud providers started out behind, but they’ve had a long time to catch up, they can afford to recruit the best of the best and they’re constantly pushed by a wider range of customer and security demands than our datacenters will ever be.
Another is liability. Ask your legal department about the contracts they have signed with your IP providers. Those contracts require that the company provide best efforts in ensuring their IP data is kept secure. This is legal-speak requiring that the efforts they make will be at least as good as the best efforts that can be found any company, not just in companies like ours.
Back in the day, that was pretty subjective. We could make a list of all the things we were doing to ensure our IP provider data was secure, everyone would look at the list, say “wow, long list, we’re impressed” and that would be good enough. But now there are objective benchmarks – the cloud providers. Anyone can go to these websites and download their security provisions.
Are we doing as much as Microsoft, Amazon, Google, IBM and others, including what they recommend as best practices? Point by point? If not, we are not making best efforts according to a legally supportable definition of that term, and we’re in violation of the contract. Ultimately this isn’t something we engineers get to decide; it’s a decision more likely to be made by the CEO, the board and consulting counsel.
Then think about what our company has moved to the cloud over the last three years. HR has HIPAA (health insurance) data and payroll there. They have our resumes there and the NDAs we signed. Finance has stock grants, contracts, accounts. Everything critical to the business – stuff that both financially and legally the company and its employees cannot afford to have hacked – it’s all in the cloud, apart from our design.
About that design. When a company signs a sales contract with a customer, part of that contract covers escrow, a requirement that we deposit all our design data, software, documentation, test suites and so on in some safe place. This provides customers with an option, if disaster hits, to retrieve the data so they can continue to support whatever they bought from us and can make new versions themselves or through some other provider if needed.
Escrow is a serious legal business. Cloud-based escrow even has a name: Escrow as a Service (EaaS). So all our design crown jewels are already in the cloud, at least for past designs.
So next time any of us want to argue that we can’t do verification or whatever in the cloud because it’s not secure? No – just no. Once reasonable, security concern as a defense has become the veritable Monty Python parrot – kicked the bucket, shuffled off this mortal coil, gone to meet its maker and joined the choir invisbule. Funny, but very out of touch.
Metrics provides cloud-based verification. You might want to check them out.
[post_title] => Private Datacenter Safer than the Cloud? Dangerously Wrong.
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => private-datacenter-safer-than-the-cloud-dangerously-wrong
[to_ping] =>
[pinged] =>
[post_modified] => 2020-04-01 12:28:57
[post_modified_gmt] => 2020-04-01 19:28:57
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284309
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 4
[filter] => raw
)
[2] => WP_Post Object
(
[ID] => 284346
[post_author] => 19
[post_date] => 2020-04-01 10:00:18
[post_date_gmt] => 2020-04-01 17:00:18
[post_content] =>
It's a shame that the U.S. president and his administration have chosen to criticize and attack China for its poor management of the novel coronavirus crisis. It is rapidly becoming evident that China now knows more than any other country how to effectively confront the pathogen and bring it to its knees.
Rather than reaching out and embracing Chinese leaders, particularly in the healthcare community, the U.S. has turned its back. It's not too late for the U.S. to change its tune and have a listen to a little advice from the East. It might even save lives.
Early on, China recognized the need to shutdown Wuhan, the area most immediately impacted by the outbreak. But a shutdown in China has a very different from the meaning of a shutdown in the West. China closed all businesses and public transportation. As my colleague in Beijing put it to me: "If you needed or wanted to go to the hospital, you walked."
These stern measures looked nasty and unfair from outside China. From inside China it simply made sense, and it didn't matter because there was no choice. The key, though, was the speed of the reaction once the nature and scope of the crisis was grasped by political leaders.
This speed characterizes the core of Chinese technnical innovation. China, along with other Asian nations, has demonstrated a keen ability to combine government direction and guidance with nimble private enterprise to rapidly close the technology gap with the West. This has clearly been demonstrated in the very public response to the COVID-19 pandemic as well as in the automotive industry, where I work.
China's automobile industry is now stirring, rising from the ashes of a traumatic struggle with the COVID-19 coronavirus which struck three months ago in Wuhan, considered by some to be the center of China's car making culture with multiple OEM and supplier factories. Most observers of China in the automotive industry tend to focus on the size of the Chinese automotive market and its rate of growth. What most miss on first glance is the volume and variety of innovation.
China accounts for nearly a third of total global vehicle production. Until recently, China was also the fastest growing automobile market on the planet. The amazing thing about these two figures is the fact that nearly all of the vehicles made in China are consumed in China.
The Chinese automotive market is a massive, self-contained entity where innovation has been allowed to run wild as dozens of auto makers - both domestic car companies and joint ventures with foreign car makers - battle for both domination and differentiation. While the market outside China appears to be slowly consolidating around a couple of dozen large car makers, China's home-grown automobile economy continues to sprout new car making startups, many of them targeting the market for electric vehicles. (It should be noted that the government has regularly intervened in the automotive market to either stimulate sales and the creation of new care makers - or to discourage new startups and encourage consolidation.)
But before autonomous vehicles and electric vehicles came along, Chinese auto makers embraced connectivity - a proposition that lit the fuse of automotive tech innovation that burns brightly to this day. One of the first connected cars in China, introduced nearly a dozen years ago, and also the first car with an Android operating system in its infotainment system, was the Roewe 350 with InkaNet (i.e. in car net) from SAIC Motors.
The Roewe 350 did not fare well due, in part, to the limitations of Android at the time. But the idea of injecting Android into a car dashboard originated in China. The system allowed SAIC to experiment with a wide range of Android-based applications including my favorite: Walkie Talkie.
The Walkie-Talkie app allowed drivers across multiple streams to communicate with other drivers in real-time while they drove. I thought the app would be a powerful traffic information sharing tool. The reality was that users shared their thoughts about the latest soccer contest in Europe or other social or political issues of the day. Walkie-Talkie, clever though it was, faded and died.
But there were many other innovations. I remember John Du, chief technologist at GM China, creating an app to allow drivers to connect and communicate based on license plate identification. Again, a clever idea, but this one never made it into a dashboard.
More recently Nio Motors has intdocued Nomi, an AI-enabled, dashboard mounted, animated and robotic digital agent for interacting with drivers and passengers and also capable of taking selfies. Again, an incredibly innovative way to advance customer engagement and one that has been replicated with on-dash holograms and other avatar-based in-vehicle assistants.
These innovations are only a handful of the massive array of infotainment, connectivity, and safety innovations emerging from China's automotive market. The automotive industry and the world would be wise to recognize the innovation engine that is the Middle Kingdom.
That innovation is manifest today in ride hailing operator DiDi Chuxing's response to the COVID-19 outbreak. Exactly 30 days ago, DiDi rolled out a program to install protective plastic dividers in the millions of cars on its ride-hailing platform to protect drivers and passengers from transmission of the virus.
By the time DiDi deployed the plastic dividers the company had already set up service stations for sterilizing cars, monitoring the temperatures of drivers, and distributing free facial masks in more than 148 cities across the country, according to the South China Morning Post. The SCMP noted that the plastic shield installation effort represented a $14.3M investment by the company.
The significance of this DiDi effort is that it remains thus far unmatched anywhere else in the world - most notably not at Uber. It also positions DiDi to capitalize on the post-COVID-19 need for safe transportation as public transportation networks restart - but with public transporation riders likely to be looking for safer alternatives.
We have a lot to learn from China in this post-COVID-19 world. The sooner we choose to listen to and learn from China the sooner we will begin saving lives and get back to work. We have already far surpassed China in the number of infected citizens in the U.S. This is not the kind of leadership the world expects from the U.S.
[post_title] => COVID-19 and Chinese Automotive Innovation
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => covid-19-and-chinese-automotive-innovation
[to_ping] =>
[pinged] =>
[post_modified] => 2020-04-03 10:18:56
[post_modified_gmt] => 2020-04-03 17:18:56
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284346
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 2
[filter] => raw
)
[3] => WP_Post Object
(
[ID] => 283673
[post_author] => 11830
[post_date] => 2020-04-01 06:00:52
[post_date_gmt] => 2020-04-01 13:00:52
[post_content] => 
I recently had the opportunity to attend a SemiWiki webinar entitled “Chip-to-Chip Communication for Enterprise and Cloud”. The webinar was presented by SiFive and explored chip-to-chip communication strategies for a variety of applications. In the first part of the webinar, Ketan Mehta, director of SoC IP product marketing at SiFive explored the uses of the Interlaken protocol. This specification has been around since 2007 and SiFive is on their 8th generation of Interlaken IP. It is the protocol of choice for many demanding data communication applications.
Ketan began with an overview of the markets that can be served by Interlaken IP, which include networking, AI/ML, data center, high-performance computing/cloud. A wide range of markets that all share the need to move more and more data. Looking a bit closer at the problem, we see communication needs driven by massively parallel on-chip systems and chip-to-chip interfaces, the latter requirement is typically driven by the need to decompose a reticle-size chip into a series of smaller die for yield considerations. All these applications demand high performance, low latency data communication.
Ketan pointed out that the Interlaken protocol is agnostic to the physical layer implementation and so we can see Interlaken channels implemented with high-speed SerDes as well as parallel wires. The protocol allows for a “light weight” implementation when compared to specifications such as Ethernet, and this contributes to its popularity. Open-Silicon, a SiFive subsidiary, was a founding member of the Interlaken Alliance, so the company has significant depth of experience using this protocol.
Ketan then introduced SiFive’s latest low-latency Interlaken IP. He went into quite a bit of detail about the capabilities of this new IP and discussed several real-world examples of where SiFive’s Interlaken IP is used in advanced applications. He concluded with an overview of SiFive’s Interlaken IP portfolio and a discussion of their roadmap.
Next, Sundeep Gupta, senior director of SoC IP at SiFive went into more details about the features and capabilities of SiFive’s Interlaken IP portfolio. As shown in the figure, below, SiFive Interlaken IP supports a broad range of Interlaken Alliance specifications. The IP is also available in two broad types, supporting high-bandwidth and low-latency.
Sundeep discussed in significant detail the key features of this IP portfolio, including performance, SerDes support, forward-error correction (FEC) support, user interface options and many more features. He then presented several block diagrams for various configurations, explaining the structure, data processing and data flow that can be implemented. What comes across during this part or the webinar is the flexibility of this IP portfolio.
Sundeep also went into details about how to create an optimal physical implementation of this IP during place and route. The ability to implement data redundancy was also covered, as well as information of how to use the IP in multi-core configurations, including lane distribution and lane remapping details.
Sundeep then discussed SiFive’s new low-latency IP for Interlaken support. This IP can deliver a 50% reduction in latency as compared with SiFive’s high-bandwidth IP. The features of this IP were covered, as well as an overview of how low-latency performance is achieved. He concluded his presentation with an overview of the deliverables provided by SiFive, summarized in the figure below.
The webinar concluded with a series of very detailed questions that further helped to illustrate the capabilities and roadmap of SiFive. If you’re involved in chip design requiring high-performance data communications, you will get a lot of benefit from this webinar. The good news is that a replay of the event is available here. The run time of the event is under 30 minutes, so you will learn a lot with a small investment in time.
[post_title] => Chip-to-Chip Communication for Enterprise and Cloud
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => chip-to-chip-communication-for-enterprise-and-cloud
[to_ping] =>
[pinged] =>
[post_modified] => 2020-04-01 16:40:45
[post_modified_gmt] => 2020-04-01 23:40:45
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=283673
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 0
[filter] => raw
)
[4] => WP_Post Object
(
[ID] => 284313
[post_author] => 13
[post_date] => 2020-03-31 10:00:52
[post_date_gmt] => 2020-03-31 17:00:52
[post_content] => Embedded non-volatile memory (eNVM) plays an essential role in most systems and SoCs. eFLASH has found its way into a wide range of devices, including automotive, industrial, IoT and those in a mixture of other markets. NAND Flash has proven to be a workhorse in all of these areas. For instance, MCUs use them for code and data storage and analog chips use them for trim and configuration information. Requirements for new and additional functionality in these systems is driving the need for increased use of eNVM. At the same time these new requirements are also pushing these designs into smaller technology nodes.
In their upcoming webinar, GLOBALFOUNDRIES (GF) will point out that NAND FLASH is going to hit a wall after 28nm. This means that the industry will need a compelling alternative for newer designs. The webinar titled “eNVM technology Choices for Advanced Automotive, Industrial and Multi Market Solutions in Partnership with Globalfoundries” provides a forward look at how designers can adapt as new eNVM technologies become necessary and even desirable. Martin Mason is the presenter for the webinar. He is the Senior Director for Embedded Memory at GF.
What will be interesting to hear in this webinar is how MRAM is helping make for a smooth transition in eNVM for a wide range of applications at 22nm. Industrial and automotive applications have rigorous requirements. According to Martin eMRAM is not only up to the job but offers some strong benefits. GF’s 22FDX MRAM-F is production qualified and offers a robust 5x solder reflow.
Martin is prepared to make the case that eMRAM-F is not only as attractive as eFLASH but is actually better in a number of ways. It’s fair to say that a lot of work has been done to bring eMRAM to market, and it looks like GF has done their homework. Their third generation eMRAM on 22nm is equal to or better than eFLASH in almost every important figure of merit. According to Martin eMRAM surpasses eFLASH in write speed and write power, two very important metrics. Its endurance rivals or exceeds eFLASH. And apparently even concerns about environments with magnetic fields are not warranted.
eMRAM gets really interesting when you look at cost and complexity. Typically, eMRAM needs 3 additional masks plus an alignment mask versus 10 or more masks for eFLASH. GF is in production with eMRAM-F on their 22FDX process. They offer -40C to 125C MRAM macros in 4Mb to 48Mb. Martin will get into the specific performance and specs for their qualification designs during the webinar. He will also discuss in detail endurance figures and the lack of read margin degradation at high numbers of read cycles.
Interestingly, at nodes below 20nm MRAM can be tuned for use as high speed memory offering a replacement for SRAM. Martin will discuss this in the webinar as well. So, the future for MRAM is quite promising.
Often when we look out at the horizon and see new technology in development, it is easy to step back and wait until that technology matures before spending any real time considering it. It was not that long ago that suggesting investigating MRAM might have not been seen like a good idea. However, MRAM is now proven and offers many advantages. This webinar on April 7th at 10AM PDT is a perfect way to gather useful information on this topic.
[post_title] => Webinar on eNVM Choices at 28nm and below by Globalfoundries
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => webinar-on-envm-choices-at-28nm-and-below-by-globalfoundries
[to_ping] =>
[pinged] =>
[post_modified] => 2020-03-31 03:38:21
[post_modified_gmt] => 2020-03-31 10:38:21
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284313
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 2
[filter] => raw
)
[5] => WP_Post Object
(
[ID] => 284049
[post_author] => 16
[post_date] => 2020-03-31 06:00:06
[post_date_gmt] => 2020-03-31 13:00:06
[post_content] => Mentor just released a white paper on this topic which I confess has taxed my abilities to blog the topic. It’s not that the white paper is not worthy – I’m sure it is. I’m less sure that I’m worthy to blog on such a detailed technical paper. But I’m always up for a challenge, so let’s see what I can make of this, extracting a quick and not very technical read from very technical source material.
First, a quick recap on PSS. This is a method to define a test (more properly a family of tests) at what we’d generally consider a system level, based on a declarative definition of what we want to accomplish in the test rather than how it will be accomplished. This method provides (in principle) portability of tests between verification levels (IP, subsystem, system) and verification platforms (simulation, emulation virtual platform, etc).
The devil is in the details of how you convert those high-level test representations into something that can run at one of those levels, on one of those platforms. This stage in PSS is called test realization and is implemented in exec blocks using procedure calls or test templates. As I understand it, this is where it gets ugly – in contrast to the beauty of those higher-level declarative descriptions.
The author (Matthew Ballance – product engineer and PSS technologist at Mentor) compares and contrasts the template and procedural interface (PI) approaches and comes down on the side of the PI for flexibility, ease of management and better up-front error-checking. He provides a number of examples, beyond my ability to comment, for a memory to memory DMA transfer showing the basics, and how you might handle environment and event management considerations.
He switches back to a topic where I again feel solid ground beneath my feet: reuse requirements for test realization. On reuse he emphasizes composability of realization interfaces which means they must use a common API to manage concurrency and events. I would imagine that practically you would want a common API for environment data. He talks about supporting multiple instances of realization (since you can instantiate IPs more than once), meaning that each instance needs to maintain context data. He also makes a point about addressability which I confess sailed right over my head.
For me, these points raise a question. How is this all going to work in a design with multiple IP from multiple sources? It seems like we really should have a standardized realization API allowing for all these factors to be managed in a uniform way no matter who provides the IPs you happen to use in your SoC. I’m not aware of such a standard but I’m struggling to see how otherwise PSS reuse would not involve redevelopment or modification of the realization level to some extent for each design. I’m looking forward to having PSS experts set me straight!
If not, I see a real problem because PSS has a lot to offer. In my Innovation in Verification series, we’ve already seen a couple of instances where PSS could significantly help with new kinds of coverage or improved security testing.
You can read the Mentor paper HERE.
[post_title] => PSS, Test Realization and Reuse
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => pss-test-realization-and-reuse
[to_ping] =>
[pinged] =>
[post_modified] => 2020-04-01 12:35:15
[post_modified_gmt] => 2020-04-01 19:35:15
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284049
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 0
[filter] => raw
)
[6] => WP_Post Object
(
[ID] => 284107
[post_author] => 3
[post_date] => 2020-03-30 06:00:51
[post_date_gmt] => 2020-03-30 13:00:51
[post_content] => Having the right tool for the job at hand is always a joy, and when your IC project involves RTL code, gates, transistors and even parasitic interconnect, then you need some EDA tool help for debugging and finding out why your design behaves the way it is. An FAE named Sujit Roy did a conference call with me last week to show what StarVision Pro can do with mixed-signal design debug. Sujit works at EDA Direct, a company started in 1997 providing EDA tools from Mentor, Cliosoft and Concept Engineering, along with training and services.
The StarVision Pro tool comes from Concept Engineering, an EDA company from Germany that has been in business for three decades now. I first heard about Concept Engineering about 18 years ago, because the EDA company that I worked at had a need to visualize SPICE netlists as schematics to better understand circuit simulation results from a Fast SPICE tool. It's been rewarding to see the growth of features as StarVision Pro has expanded its scope to cover so many input file formats:
[caption id="attachment_284108" align="alignnone" width="960"]
StarVision Pro[/caption]
The wow moment is when you read in a file format and then quickly visualize an automatic schematic, neatly laid out with inputs on the left and outputs on the right showing you all of the interconnect, cell instances and hierarchy. Circuit designers, logic designers and even DFT engineers can each benefit from quickly seeing how an SoC is assembled. For logic verification you can even see the logic state on each net in a design as a function of time.
During a live demo on a laptop running Linux I saw Sujit read in a digital design, and this works even if your design is incomplete, missing IP or has syntax errors. Just look at how neat the auto-generated schematic appears:
[caption id="attachment_284112" align="alignnone" width="850"]
Auto-generated schematic[/caption]
Useful debugging features include:
- Click any net and dynamically expand a cone of logic
- Cross-probe between schematic and RTL source code
- Search for nets by filtering a name
- Trace an internal net to an IO pin
In the screenshot above we've loaded in logic simulation results from a VCD file, then moved to a specific time point in the simulation run, and finally visualize the logic state on our nets. This kind of visual debug really speeds up the functional verification process to find and fix bugs.
The next design file to be read in was from a parasitic extraction tool as a SPEF file, so we can quickly see the RC values that make up a net. This screenshot shows how you can click on the schematic and cross-probe into the source file:
[caption id="attachment_284117" align="alignnone" width="850"]
Parasitic Interconnect Cross-Probing[/caption]
An engineer can then find which nets are the heaviest loaded, and Sujit ran a pre-built script that allowed him to filter and remove all capacitors below a threshold value.
A SPICE netlist was loaded, and we viewed the MOS transistors, along with some parasitic capacitors:
[caption id="attachment_284119" align="alignnone" width="850"]
SPICE netlist[/caption]
Next, we wanted to know what had changed in a SPICE netlist over time, so a DIFF script quickly highlight where the differences were located by showing that net n6 was modified:
[caption id="attachment_284120" align="alignnone" width="850"]
Net n6 was modified[/caption]
StarVision Pro comes with some 100 scripts, so I got the idea that they had automated most debugging tasks for me, saving me time from having to write my own scripts. Of course, you can always just view the Tcl source code for the scripts, and create new derivatives and combinations to make your debugging happen faster.
Videos
On YouTube there's a channel for EDA Direct, and they've recorded over a dozen intro videos on specific StarVision Pro topics, and each video is brief at under 2 minutes of viewing time:
https://www.youtube.com/watch?v=0uKj0GOb08c&t=24s
Summary
Designing, verifying and re-using mixed-signal chips and IP blocks can be a tedious and error-prone task, especially since most of the file formats are textual, which makes them difficult to understand as part of a larger or hierarchical design. Using an automatic visualization tool like StarVision Pro is sure to save you hours and days of engineering effort, because now you can see the structure of your IC design, along with simulation values in an intuitive schematic format. Circuit designers, logic designers, DFT engineers and verification engineers can all benefit by adding a tool like this to their methodology.
Related Blogs
[post_title] => Mixed-Signal Debugging Gets a Boost
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => mixed-signal-debugging-gets-a-boost
[to_ping] =>
[pinged] =>
[post_modified] => 2020-03-30 19:20:23
[post_modified_gmt] => 2020-03-31 02:20:23
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284107
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 0
[filter] => raw
)
[7] => WP_Post Object
(
[ID] => 284241
[post_author] => 14
[post_date] => 2020-03-29 14:00:50
[post_date_gmt] => 2020-03-29 21:00:50
[post_content] => 
Blocking chip sales to Huawei back on front burner
Covid19 & China Trade are equally bad
Long lived Uncertainty could "plague" industry sales going forward
Political Predictability worse than Disease Predictability
Reuters broke a story today that the proposed licensing of chip equipment to prevent "bad actors" getting chips made on US equipment was back on again, after many, including ourselves, thought it was a dead issue at least during Covid19.
Reuters Article on Chip Equip Blockade
Apparently at a meeting yesterday, cabinet officals agreed to change the "Foreign Direct Products Rule" such that licenses would be required by foreign users of US technology which would allow the US to prevent "bad actors" (read that as Huawei) from getting chips made on US chip equipment (AMAT, LRCX. KLAC et al) or equipment using US technology (ASML).
This rule change still needs presidential approval and Trump has previously been hesitant to support this but in light of the current bad relations with China over Covid19 his tune may have changed.
We were both right and wrong...very bad luck
We had joked in a prior note that:
"It would be a case of very bad luck if just when we start to get over the pandemic that the government would step in and halt sales that just restarted.......
Like getting over a bad case of the flu only to walk outside and get hit by a truck...."
Haircut becomes Crewcut - March 10th
We were also wrong in our most recent note in which we suggested that it it would be crazy and unthinkable that the administration would go forward with the blockade.
"We think the likelihood of that happening any time soon is just about zero as the US can't do anything to upset China as China supplies 90% of our pharmaceuticals, the majority of our PPE (personal protective equipment) like masks, and probably a lot of ventilators."
Covid19 Cycle
I guess we don't care if China cuts off our supply of medicine or PPE or ventilators at the worst possible time in retribution for us cutting off Huawei......
The only take away thats clear is that the predictability of Covid19 is better than the predictability of politics which remains a loose, wild cannon....
Embargo collision course with Taiwan and TSMC
Back in February when the embargo discussions hit a high note we talked about the collision course we were setting ourselves up for with Taiwan and TSMC...
China Chip Equip Embargo
We are now obviously back on that collision course and will be taking some of our allies along with us form the ride wether they like it or not. Most notably will be the Netherlands and ASML which did not ship an EUV tool to China due to pressure from the US.
The proposed rule change also includes equipment made with US technology which is a clear definition of ASML's EUV tools as the heart and soul of the tool is the EUV source invented and made in the USA by former Cymer in San Diego.
At the time of the sale of Cymer to ASML there were security concerns and we could imagine that there may have been secret agreements or assurances about control of that technology that were agreed to in order to win approval of that deal.
Aside from the collision course with TSMC the rule could essentially halt all equipment sales to China as there would be no way that a Chinese chip making company would agree to not sell to Huawei (let alone TSMC).
We would be back to a virtual death sentence for Chinese Chip companies much like the now dead and buried Jinhua.
But the collateral damage would be putting US equipment makers in the intensive care unit as China is the fastest growing and most significant part of their business.
Where would this put the US vis a vis Taiwan?
TSMC is the crown jewel of Taiwan which remains a short boat ride away from China and between a rock and a hard place.
Much as China was very upset with the Netherlands over the ASML EUV embargo, China would absolutely freak out if Taiwan stopped selling critical, 5G chips to Huawei. It would be much worse than a slap in the face.
Obviously things could quickly cascade into a very bad nightmare scenario with China retaliating and halting medical sales to the US or something similarly critical.
Starting another plague to add to the first
It seems as if the timing couldn't be much worse, just as the economy is in a free fall lets cut off chip equipment sales to China and start another trade war.
We hope this is political posturing or something similar. The problem is that we are concerned with the current rhetoric involving China and Covid19 and the need for someone to blame and retaliate against to generate support and re-direct angst.
But as we have previously mentioned, California is not high on the list of the current administrations supporters and most chip equipment companies are there so there may be less concern about the collateral damage generated by opening a second front of a war with China.
Stocks hate uncertainty
It is always the case that investors hate uncertainty more than almost anything else. Even more uncertainty than Covid19 has just been added to chip equipment stocks at just the worst time.
Its hard to image the stocks getting any more unstable than they already are but this embargo could easily be it.
With the stock wildly gyrating up and down 5% and 10% mper day with little stability in sight let alone a firm bottom, we are hard pressed to get back in even though the stocks are relatively cheap.
The problem is that they could get cheaper and the China embargo could go on much, much longer , long after Covid19 is a distant memory.
[post_title] => Newsflash Chip Equip Blockade back on!
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => newsflash-chip-equip-blockade-back-on
[to_ping] =>
[pinged] =>
[post_modified] => 2020-03-29 21:14:31
[post_modified_gmt] => 2020-03-30 04:14:31
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284241
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 6
[filter] => raw
)
[8] => WP_Post Object
(
[ID] => 284246
[post_author] => 19
[post_date] => 2020-03-29 12:00:27
[post_date_gmt] => 2020-03-29 19:00:27
[post_content] => 
By now it is pretty clear that everywhere outside of China and South Korea human beings are doing a lousy job of "social distancing," locking down, and sheltering in place. This is unfortunate because experts agree that only a complete lockdown will stop COVID-19 from infecting millions, continuing to kill thousands, overwhelming healthcare systems, and devastating the global economy.
Nowhere is this failure to shut down more apparent than in our willingness to allow taxis and ride hailing operators to continue to operate without safety partitions. This lax approach to COVID-19 policy must end.
The onset of COVID-19 has exposed an essential weakness of the transportation gig economy - the lack of safety partititions in ride hailing vehicles. In fact, the pervasive competitive influence of ride hailing operators such as Uber and Lyft in the U.S., led, in 2016, to the New York City Taxi and Limousine Commission dropping the requirement for a safety shield in yellow taxis.
The NYTLC predicated its decision on the need for taxis to be able to be more personal in order to more effectively compete with Uber and Lyft. What the agency seemed to have forgotten at the time, five years ago, is that prior to the institution of the safety shields more than 40 taxi drivers were being murdered every year. The installation of safety shields nearly completely eliminated these fatal encounters.
We now have potentially fatal encounters of an entirely different kind - drivers, who may be infected with the coronavirus, driving passengers who may be infected with the coronavirus, creating a powerful vector for spreading the disease across the landscape. While taxi and ride hailing business is down 60%-70% - drivers can still handle 10-20 fares a day any one of which or all of which may be or become "spreaders" of the disease.
What is the response from Uber and Lyft? Encourage drivers and passengers to wash their hands, wear masks, don't touch your face, and, my favorite: ROLL THE WINDOWS DOWN! Seriously? Roll the windows down as an anti-COVID-19 measure?
Serious social distancing or lockdown policy must forbid the use of taxi or ride hailing service providers unless the individual operators have a certified safety shield permanently installed in their vehicles. There is a reason we have regulatory agencies overseeing the taxi industries. The lives of passengers and drivers are at stake. There are well understood safety measures in place that were created decades ago when drivers were being routinely assaulted and, in some cases, killed by anonymous passengers.
Airlines have been shut down. People are too close for safety on planes and planes should not be transporting potentially infected passengers anywhere - domestically or internationally - with the exception of exceptional circumstances.
Public transportation networks have been shutdown or are offering reduced service. Like planes, passengers are in too close proximity on trains and buses and there are too many touchable surfaces to guarantee safety.
Taxis and ride hailing operators MUST shut down, unless their vehicles are equipped with certified safety shields. There is no excuse. Allowing these operators to continue to function as if it is business as usual is criminal.
It is not unlike retail clerks. We are beginning to hear stories of retail clerks at pharmacies and grocery stores testing positive and, in at least one case in Italy, dying. Supermarket chains in the U.S. are in the process of erecting Plexigas shields at their cash registers to protect their clerks. Like post-911 airport security - these Plexigas shields are likely to become a permanent fixture at your local grocery store.
Partitions actually serve many functions as evidenced by the Rolls Royce Phantom Partition Wall which includes an intercom and a pass-through for notes (but big enough for a weapon). Notes Project Manager Doug Claus: "The Phantom is the vehicle of choice for ‘social distancing’ in the ultimate luxury sector.”
Claus says the electrochromatic screen on the Phantom Partition Wall changes from transparent to opaque at the touch of a button. There is an integrated intercom system which mutes the front compartment audio system as the owner’s call is patched through immediately, but requires the owner to accept a call from the front compartment, so as not to be unduly interrupted.
The partitions implemented by taxis and ride hailing operators may not rise to the level of luxury and performance of the Phantom Partition Wall, but the masses requiring transportation beyond the luxury sector are entitled to the same level of safety and security. Uber, Lyft, Gett, Grab, Via, Yandex, DiDi and the rest of the ride hailing operators - and yellow and black and green and blue taxis - must have partitions to operate safely in the time of COVID-19. To proceed otherwise is to court disaster in the name of business as usual.
For further insight into mobility strategies, regulations, decision making, please register for and join a Strategy Analytics Webinar, for this Thursday, March 26th:
Swiss MaaS: The Evolution of Mobility in Switzerland, Europe and the World
https://www.strategyanalytics.com/strategy-analytics/webinars-and-events/webinars/strategy-analytics-webinar/swiss-maas-the-status-of-mobility-in-switzerland-europe-and-the-world
[post_title] => Shut Uber Down Now
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => shut-uber-down-now
[to_ping] =>
[pinged] =>
[post_modified] => 2020-03-29 10:46:33
[post_modified_gmt] => 2020-03-29 17:46:33
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284246
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 2
[filter] => raw
)
[9] => WP_Post Object
(
[ID] => 284250
[post_author] => 19
[post_date] => 2020-03-29 10:00:32
[post_date_gmt] => 2020-03-29 17:00:32
[post_content] => 
2019 will be remembered as the year the automotive industry decided to right-size its autonomous vehicle ambitions. Multiple auto makers tempered their vaunted claims for delivering fully autonomous cars within a few years and Daimler Chairman of the Board Ola Kälenius declared in December that the pursuit of autonomous “robotaxis” was proving more challenging than originally thought, so the company was shifting its focus toward autonomous trucks.
Kallenius added to his AV skepticism earlier this month when he said Daimler would further prioritize electric vehicle development over autonomous cars in view of urgent European and global regulatory requirements. But autonomous vehicle thought leadership at Daimler originated with Christoph von Hugo. Speaking at the Paris Auto Show in 2016, von Hugo, head of active safety for Daimler, sought to put AV ethical concerns to rest when he averred that autonomous driving systems would, first and foremost, opt to protect passengers and drivers over bystanders.
In this context it is interesting to note that 2019 actually ended with two fatal crashes of cars built by Tesla Motors – one outside Terre Haute, Indiana, and one in Gardena, California - both of which may have been using Tesla's semi-autonomous Autopilot function. There were several unique aspects to the Gardena crash that are likely to change the conversation around the semi-automated driving enabled by Autopilot.
Among the unique aspects of the Gardena crash were the following:
- Tesla CEO Elon Musk chose not to comment after the crash.
- The two fatalities in Gardena were passengers in another vehicle which was hit by the Tesla vehicle.
- This was the first occasion of two fatal Tesla crashes in a single day.
After previous crashes of Teslas that took the lives of the Tesla drivers, Musk had been quick to implicate the drivers' misuse or abuse of the Autopilot function (taking advantage of Tesla's remote access to vehicle operational data), after confirming it was in use. Musk has said nothing in regard to either the Gardena crash or the crash in Indiana.
The Gardena crash, which occurred at a traffic light located at the junction of Route 91 where it becomes Artesia Boulevard, caused injuries to the driver of the Tesla and a passenger in the car, while killing the driver and passenger of a Honda Civic. According to reports from the crash scene, the Tesla ran a red light and crashed into the Honda.
In the Indiana crash, the Tesla crashed into a parked firetruck. The driver survived. The passenger in the Tesla was killed. The National Transportation Safety Board (NTSB) and the National Highway Traffic Safety Administration (NHTSA) both indicated publicly at the time of the two crashes that they would be investigating.
The deafening silence from Musk is telling. It tells us that Musk has learned to keep his mouth and his Twitter account quiet when NTSB and NHTSA are investigating fatal crashes. There are multiple potential causal scenarios in both fatal crashes.
It is quite possible that Autopilot was not engaged in either crash, in which case the likely culprit will be driver inattention or distraction. Or it may be that Autopilot was engaged, in which case, in Indiana, the system failed to identify a fire engine parked in a travel lane with its flashing lights on, and, in Gardena, the Tesla vehicle failed to recognize the transition from Route 91 to Artesia Boulevard – a transition market by an intersection with a traffic light.
The impact of the crash in Gardena is likely to be felt sometime later in 2020. If the existing pattern holds, the investigations of both the NTSB and NHTSA are likely to require nearly a year to complete, so there is a long, delayed fuse to the detonation of their findings which are likely to alter Tesla’s operations.
What has changed this time around for Tesla is that a Tesla vehicle is responsible for the deaths of other road users. Where, in the past, Tesla vehicles operating on Autopilot had failed Daimler’s key rule of autonomous technology: to first protect the driver. In this case, in Gardena, the Tesla did indeed protect the driver while taking the lives of occupants of another vehicle. In effect, the Tesla vehicle appears to have adhered to the Daimler AV principle with disastrous results.
Researchers have sometimes compared the behavior and driving characteristics of distracted drivers to the behavior of drunk drivers. This comparison is notable as a drunk might argue that his behavior is benign at least up to and until he or she decides to drive a car.
Tesla Motors’ Autopilot, too, could be considered to be benign, that is up to and until it is asked to perform in inappropriate circumstances and without the supervision of a human driver. In the Gardena case, the Tesla vehicle, if it is determined to have been operating in Autopilot, appears to have failed to recognize:
- Thee transition from highway to surface streets;
- The existence of a traffic light;
- The fact that the light was actually red;
- And the presence in the intersection of another vehicle.
The two fatalities in the Honda completely change the conversation regarding Autopilot and will give rise to the question of Federal intervention. After the fatal crash of a Tesla in Mountain View, California, two years ago the NTSB’s investigation, only recently concluded, delivered a set of recommendations to NHTSA, SAE International, the Occupational Safety and Health Administration, Manufacturers of Portable Electronic Devices (Apple, Google, HTC, Lenovo, LG, Motorola, Nokia, Samsung, and Sony), Apple, Tesla Motors, the Consumer Technology Association, and the California State Transportation Authority.
Those recommendations in their entirety can be found here:
https://www.ntsb.gov/news/events/Documents/2020-HWY18FH011-BMG-abstract.pdf
It appears that the NTSB either lacks the authority or has not chosen to assert the authority to interfere in Tesla’s operations. It has issued recommendations and, in the latest report, reiterated some recommendations which Tesla has thus far ignored. The fundamentally unique nature of the latest crash has raised the stakes for the NHTSA, the NTSB, and for Tesla Motors, which now has more than 700,000 of its vehicles on the road equipped with Autopilot, according to some estimates.
Musk has long asserted, as he did during the latest NTSB investigation, that Autopilot remains a beta product – still in development and subject to ongoing refinement. Without an immediate and affirmative effort to respond to the NTSB’s recommendations, Tesla can no longer expect the kind of NTSB wrist slap it received earlier this year following the Mountain View investigation. NTSB, NHTSA, and the public cannot countenance routine fatal crashes from Teslas - especially now that we know that it isn't just Tesla drivers that are at risk.
[post_title] => Tesla’s 2019 Turning Point
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => teslas-2019-turning-point
[to_ping] =>
[pinged] =>
[post_modified] => 2020-03-29 21:14:52
[post_modified_gmt] => 2020-03-30 04:14:52
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284250
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 0
[filter] => raw
)
)
[post_count] => 10
[current_post] => -1
[in_the_loop] =>
[post] => WP_Post Object
(
[ID] => 284053
[post_author] => 11830
[post_date] => 2020-04-03 06:00:03
[post_date_gmt] => 2020-04-03 13:00:03
[post_content] => I concluded my last post on the topic with an inventory of the key attributes needed to fill the ASIC void created by the relentless consolidation in semiconductors. There were five items, as follows:
- Design and manufacturing expertise in a market that requires custom chips
- Differentiating IP and the skills to integrate it into a customer’s design
- A solid design methodology and the discipline to enforce it
- A willingness to partner with the customer – a shared vision for success is key
- A solid track record of successful bring-up of designs in target systems
I also mentioned Presto Engineering and their acquisition of DELTA Microelectronics. What does that combination do for the ASIC ecosystem? How does this company fit? I took a look at Presto through the lens provided by the list, above. Here’s what I found…
If you visit the Presto Engineering website, you’re greeted with “Your Trusted Microelectronics Partner”. That sounded like the sentiments of point 4, above. Probing a bit more, I found an informative, under two-minute video on Presto’s OCEAN Platform.
OCEAN is a rather sophisticated web-based system that manages all phases of chip logistics tracking and development, from tapeout to volume manufacturing. Full transparency, proactive management and risk-reduction. I encourage you to watch this video if you have a couple of minutes. This is sounding a lot like point 4. You can also learn more about Presto’s supply chain management capabilities here. In my travels through the Presto website, I found a combination of capabilities from both Presto and DELTA. It appears that they are keeping the DELTA brand. The combined offering provided some very helpful perspectives.
Let’s circle back to point 1. You can find good information about IoT and security applications on Presto’s website. These are both markets that clearly need custom silicon. There is also a pedigree in RF and mixed-signal solutions at Presto. This expertise allows them to offer sensor capabilities for IoT, in addition to low-power design and wireless communications, key ingredients for this market. You will also find expertise on contactless payment cards. This technology utilizes near-field communication (NFC), energy harvesting and security, all areas that need custom silicon and are growing rapidly. Another high-growth area is automotive and autonomous driving. Presto also participates here, both in terms of advanced testing to support automotive qualification and sensor technology for autonomous driving, I would say point 1 is well covered.
Probing on point 2, I found relevant digital and analog IP. Everything from processor cores, DES/triple DES processors and LVDS I/Os to PLLs, data converters, sensors, battery monitors and more. These all tie back to the ASIC design services provided by Presto, through DELTA. Point 2 appears to be covered as well.
On to point 3, design methodology. There’s a lot to say here. The site talks about a rigorous specification process, supported by proven IP, design reviews and careful verification and testability planning throughout. I know all these items are quite important to a successful project and I was glad to see this discussion. The methodology doesn’t stop at design, also a good thing. Foundry management, parametric, functional and life test, packaging, DFT and inventory management are discussed as well. The OCEAN Platform video also talks about these activities. Point 3 appears to be covered.
We already discussed point 4, leaving point 5, bring-up track record. You will find discussions on the Presto website about operating life and stress testing (HTOL/HAST for those who like acronyms). Custom hardware and extensive test facilities are needed for these critical bring-up tasks. They are covered. You can view a series of customer success stories here.
Stacking up points 1-5 indicates to me the new, combined Presto/DELTA organization checks the boxes as a focused ASIC supplier contender. The industry needs more dedicated ASIC suppliers – it’s good for emerging businesses and the semiconductor industry in general. Presto Engineering and DELTA Microelectronics are both based in Europe, France and Denmark respectively. The combined company does offer a global footprint from a sales and support point of view.
In the press release announcing the DELTA acquisition, Michel Villemain, the CEO of Presto Engineering said, “This acquisition allows us to expand our business and provide industrial and semiconductor companies with a consolidated European partner that offers ASIC design, test, qualification and manufacturing expertise.” It will be interesting to watch Presto as they build ASIC momentum.
[post_title] => Filling the ASIC Void – Part 2
[post_excerpt] =>
[post_status] => publish
[comment_status] => open
[ping_status] => open
[post_password] =>
[post_name] => filling-the-asic-void-part-2
[to_ping] =>
[pinged] =>
[post_modified] => 2020-04-02 17:39:28
[post_modified_gmt] => 2020-04-03 00:39:28
[post_content_filtered] =>
[post_parent] => 0
[guid] => https://semiwiki.com/?p=284053
[menu_order] => 0
[post_type] => post
[post_mime_type] =>
[comment_count] => 0
[filter] => raw
)
[comment_count] => 0
[current_comment] => -1
[found_posts] => 6920
[max_num_pages] => 692
[max_num_comment_pages] => 0
[is_single] =>
[is_preview] =>
[is_page] =>
[is_archive] =>
[is_date] =>
[is_year] =>
[is_month] =>
[is_day] =>
[is_time] =>
[is_author] =>
[is_category] =>
[is_tag] =>
[is_tax] =>
[is_search] =>
[is_feed] =>
[is_comment_feed] =>
[is_trackback] =>
[is_home] => 1
[is_privacy_policy] =>
[is_404] =>
[is_embed] =>
[is_paged] =>
[is_admin] =>
[is_attachment] =>
[is_singular] =>
[is_robots] =>
[is_posts_page] =>
[is_post_type_archive] =>
[query_vars_hash:WP_Query:private] => 443e714a5290f77b0df02e2f78f50560
[query_vars_changed:WP_Query:private] =>
[thumbnails_cached] =>
[stopwords:WP_Query:private] =>
[compat_fields:WP_Query:private] => Array
(
[0] => query_vars_hash
[1] => query_vars_changed
)
[compat_methods:WP_Query:private] => Array
(
[0] => init_query_flags
[1] => parse_tax_query
)
[tribe_is_event] =>
[tribe_is_multi_posttype] =>
[tribe_is_event_category] =>
[tribe_is_event_venue] =>
[tribe_is_event_organizer] =>
[tribe_is_event_query] =>
[tribe_is_past] =>
)
I concluded my last post on the topic with an inventory of the key attributes needed to fill the ASIC void created by the relentless consolidation in semiconductors. There were five items, as follows:
- Design and manufacturing expertise in a market that requires custom chips
- Differentiating IP and the skills to integrate it into
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The irony around this topic in the middle of the coronavirus scare – when more of us are working remotely through the cloud – is not lost on me. Nevertheless, ingrained beliefs move slowly so it’s still worth shedding further light. There is a tribal wisdom among chip designers that what we do demands much higher security than any other… Read More
It’s a shame that the U.S. president and his administration have chosen to criticize and attack China for its poor management of the novel coronavirus crisis. It is rapidly becoming evident that China now knows more than any other country how to effectively confront the pathogen and bring it to its knees.
Rather than reaching
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I recently had the opportunity to attend a SemiWiki webinar entitled “Chip-to-Chip Communication for Enterprise and Cloud”. The webinar was presented by SiFive and explored chip-to-chip communication strategies for a variety of applications. In the first part of the webinar, Ketan Mehta, director of SoC IP product marketing… Read More
Embedded non-volatile memory (eNVM) plays an essential role in most systems and SoCs. eFLASH has found its way into a wide range of devices, including automotive, industrial, IoT and those in a mixture of other markets. NAND Flash has proven to be a workhorse in all of these areas. For instance, MCUs use them for code and data storage… Read More
Mentor just released a white paper on this topic which I confess has taxed my abilities to blog the topic. It’s not that the white paper is not worthy – I’m sure it is. I’m less sure that I’m worthy to blog on such a detailed technical paper. But I’m always up for a challenge, so let’s see what I can make of this, extracting a quick and not very… Read More
Having the right tool for the job at hand is always a joy, and when your IC project involves RTL code, gates, transistors and even parasitic interconnect, then you need some EDA tool help for debugging and finding out why your design behaves the way it is. An FAE named Sujit Roy did a conference call with me last week to show what StarVision… Read More
Blocking chip sales to Huawei back on front burner
Covid19 & China Trade are equally bad
Long lived Uncertainty could “plague” industry sales going forward
Political Predictability worse than Disease Predictability
Reuters broke a story today that the proposed licensing of chip equipment to prevent “bad… Read More
By now it is pretty clear that everywhere outside of China and South Korea human beings are doing a lousy job of “social distancing,” locking down, and sheltering in place. This is unfortunate because experts agree that only a complete lockdown will stop COVID-19 from infecting millions, continuing to kill thousands,
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2019 will be remembered as the year the automotive industry decided to right-size its autonomous vehicle ambitions. Multiple auto makers tempered their vaunted claims for delivering fully autonomous cars within a few years and Daimler Chairman of the Board Ola Kälenius declared in December that the pursuit of autonomous “robotaxi
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[after] =>
[rw_opt] => Array
(
[widget_select] => 1
[pageid_281769] => 1
[pageid_281772] => 1
)
[display_widget_mobile] =>
)
COVID-19 and Chinese Automotive Innovation