Ansys Multiphysics PlatformBackground Traditionally, the interface between chip designers and…Read More
WEBINAR: Architecture Exploration of System-on-chip using VisualSim Hybrid RISC-V and ARM Processor library80% of specification optimization and almost 100% of…Read More
ASML- A Semiconductor Market Leader-Strong Demand Across all Products/Markets- Strong demand across logic/memory & leading/trailing edge…Read More
Last week, Mobileye released a 40-minute long unedited video of the company’s camera-only Supervision automated driving system in action on the chaotic streets of New York City. The video release was part of an announcement of an expansion of Mobileye’s testing of autonomous vehicle technology including New York City (as the… Read More
Our latest book has finally been published! A PDF version of “Prototypical II – The Practice of FPGA Prototyping for SoC Design” is now available in the SemiWiki book section. The first book “Prototypical – The Emergence of FPGA Prototyping for SoC Design” was published in 2016 and a lot … Read More
-KLA dominates process control like ASML dominates litho
-Industry in “panic mode” over capacity drives process control
-Like others, KLA tool supplies are in demand & tight supply
-Balance of 2021 “filled out” – now booking for 2022
Solid numbers and very solid guide for a better second … Read More
-$80B + in WFE with strong back half in 2021
-Trailing edge strength adds to overall great demand
-Supply side headwinds require effort- Malaysia now open
-It just comes down to execution which Lam has done well
Nice beat and sandbagged guide
As Lam has done consistently for many quarters now, they beat numbers with Revenues of $4.15B… Read More
Dan is joined by Dr. Rosemary Francis. Rosemary was the managing director and CEO of Ellexus Ltd. before its acquisition by Altair. Dan explores the I/O profiling technology Ellexus brought to Altair, it’s impact and the implications for the future. A behind-the-scenes view of the acquisition is also provided.
Dr. Rosemary… Read More
Intel recently provided a detailed silicon process and advanced packaging technology roadmap presentation, entitled “Intel Accelerated”. The roadmap timeline extended out to 2024, with discussions of Intel client, data center, and GPU product releases, and especially, the underlying technologies to be … Read More
Electronic design automation (EDA) has come a long way from its beginnings. It has enabled chip engineers from specifying designs directly in layout format during the early days to today’s capture in RTL format. Every advance in EDA has made the task of designing a chip easier and increased the design team productivity, enabling… Read More
As I read both the popular and technical press each week I often see articles about computer systems being hacked, and here’s just a few vulnerabilities from this week:
In every chip, power is a progressive problem to be solved. Designers have long had to rely on a combination of experience and knowledge to tackle this dilemma, typically having to wait until after silicon availability to perform power analysis with realistic software workloads. However, this is too late in the game, as it becomes… Read More
Instrumenting post-silicon validation is not a new idea but here’s a twist. Using (pre-silicon) emulation to choose debug observation structures to instrument in-silicon. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research… Read More
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