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Empyrean Logo SemiWiki
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Analysis of Curvilinear FPDs

Analysis of Curvilinear FPDs
by Daniel Payne on 12-31-2020 at 6:00 am

FPD voltage distribution analysis min

This area of automating the design of Flat Panel Displays (FPD) is so broad that it has taken me three blogs to cover all of the details, so in brief review the first two blogs were:

My final blog covers five areas:

  • DRC/LVS for curvilinear layout
  • Circuit
Read More

Curvilinear FPD Layout and Schematics

Curvilinear FPD Layout and Schematics
by Daniel Payne on 12-03-2020 at 10:00 am

layout ladder min

You are likely reading this blog using a Flat Panel Display (FPD), because they are so ubiquitous in our desktop, tablet and smart phone devices. Today I’m following up from a previous article. A quick recap of the unique design flow for FPD is shown below:

What follows is the second part of a Q&A discussion with Chen Zhao… Read More


Automating the Design of Flat Panel Displays

Automating the Design of Flat Panel Displays
by Daniel Payne on 10-29-2020 at 10:00 am

Empyrean - FPD design flow

I’ve used OLED (Organic Light-Emitting Diode) displays for many years in my monitors, laptops, tablets, e-readers and smart phones; and knew that the AMOLED (Active-Matrix OLED) displays used thin-film transistor technology where each pixel can be controlled, but I hadn’t considered the actual design process… Read More


Xilinx Moves from Internal Flow to Commercial Flow for IP Integration

Xilinx Moves from Internal Flow to Commercial Flow for IP Integration
by Daniel Payne on 08-25-2020 at 10:00 am

Xilinx IP min

I’ll never forget first learning about Xilinx when they got started back in 1984, because the concept of a Field Programmable Gate Array (FPGA) was so simple and elegant, it was rows and columns of logic gates that a designer could program to perform any logic function, then connect that logic to IO pads to drive other chips … Read More


Automating the Analysis of Power MOSFET Designs

Automating the Analysis of Power MOSFET Designs
by Daniel Payne on 06-04-2020 at 10:00 am

ventilator

There’s a world of difference between our smart phones that are battery powered and pack billions of transistors, and power MOSFET devices that can be used in industrial applications, telecom, cloud computing and automotive where they could be run at a few hundred volts and up to 80A of current. I’ve read about one … Read More


CEO Interview: Jason Xing of Empyrean Software

CEO Interview: Jason Xing of Empyrean Software
by Daniel Payne on 04-24-2020 at 10:00 am

empyrean

It’s been about seven years since Randy Smith last interviewed Jason Xing, the President/CEO of North America for Empyrean Software, so the timing felt good for a fresh update. I’ve been watching Empyrean at DAC for several years now, and have come away impressed with their growth and focus on some difficult IC design… Read More


Viewing the Largest IC Layout Files Quickly

Viewing the Largest IC Layout Files Quickly
by Daniel Payne on 03-10-2020 at 6:00 am

Skipper, Empyrean

The old adage, “Time is money”, certainly rings true today for IC designers, so the entire EDA industry has focused on this challenging goal of making tools that help speed up design and physical verification tasks like DRC (Design Rule Checks) and LVS (Layout Versus Schematic). Sure, the big three EDA vendors have… Read More


Automating Timing Arc Prediction for AMS IP using ML

Automating Timing Arc Prediction for AMS IP using ML
by Daniel Payne on 10-16-2019 at 6:00 am

Empyrean, Qualib-AI flow

NVIDIA designs some of the most complex chips for GPU and AI applications these days, with SoCs exceeding 21 billion transistors. They certainly know how to push the limits of all EDA tools, and they have a strong motivation to automate more manual tasks in order to quicken their time to market. I missed their Designer/IP Track Poster… Read More


WEBINAR: AI-Powered Automated Timing Arc Prediction for AMS IP’s

WEBINAR: AI-Powered Automated Timing Arc Prediction for AMS IP’s
by Daniel Nenni on 09-19-2019 at 6:00 am

A directed approach to reduce Risk and improve Quality

Safety and reliability are critical for most applications of integrated circuits (ICs) today. Even more so when they serve markets like ADAS, autonomous driving, healthcare and aeronautics where they are paramount. Safety and reliability transcend all levels of an integrated… Read More


Speeding up Circuit Simulation using a GPU Approach

Speeding up Circuit Simulation using a GPU Approach
by Daniel Payne on 08-22-2019 at 10:00 am

ALPS-GT

The old adage that “Time is Money” certainly rings true in the semiconductor world where IC designers are being challenged with getting their new designs to market quickly, and correctly in the first spin of silicon. Circuit designers work at the transistor-level, and circuit simulation is one of the most time-consuming… Read More