As wireless communication systems evolve toward 6G, satellite connectivity, advanced radar, and high-performance sensing applications, the integration of heterogeneous semiconductor technologies has become a critical challenge. Silicon CMOS remains the dominant platform for digital processing and system control,… Read More
Executive Interview with James Huang of AlChip
I had a chance sit down with James Huang, Director of Engineering at Alchip Technologies, to discuss the company’s recent multi-die packaging achievements and learn about Alchip’s next steps in pushing the boundaries of innovation for next generation AI ASIC.
James is acknowledged as a leading light in advanced node ASICs, based… Read More
Synopsys Demonstrates Leadership in AI-Powered Engineering at 2026 DAC Chips to Systems Conference
Purple was in fashion at the 2026 Design Automation Conference, where Synopsys reinforced its position at the forefront of AI-powered engineering. Under the conference’s “Chips to Systems” theme, the company showcased intelligent, end-to-end technologies designed to help the semiconductor industry manage unprecedented… Read More
From Process Learning to Production Control: Characterization for the Era of Heterogeneous Systems
Every generation of semiconductor innovation has relied on one fundamental principle: before a technology can be manufactured at scale, it must first be understood. That understanding comes through characterization.
For decades, characterization enabled process learning. It helped engineers understand transistor behavior,… Read More
TSMC CoPoS Versus Intel EMIB Semiconductor Packaging
TSMC’s CoPoS, generally described as Chip-on-Panel-on-Substrate, and Intel’s EMIB, or Embedded Multi-die Interconnect Bridge, address the same strategic problem: integrating increasingly large, heterogeneous chiplet systems. However, they attack different physical constraints. CoPoS is an emerging panel-level … Read More
The Architecture of Success: Why a Unified Semiconductor IP Strategy Is the Foundation of Modern SoC Design
As architects push toward advanced nodes and increasingly demanding workloads, modern silicon design has entered an era of unprecedented complexity. A single design respin can cost millions of dollars and delay market entry. Against this backdrop, designs must be balanced for performance, bandwidth, power efficiency, security… Read More
CEO Interview with Mohit Gupta of TYLsemi
Mohit Gupta founded TYLsemi to build chiplet-based intelligent power and connectivity solutions for AI infrastructure—an area where custom silicon has long been underserved. TYLsemi exists to provide the foundational chiplet platform that enables tailored custom silicon solutions for the evolving needs of AI infrastructure.… Read More
Arteris at DAC 2026 Connecting Innovation for Silicon Success
The semiconductor industry has entered a new era as AI workloads, chiplets, heterogeneous computing, software-defined vehicles, and intelligent edge devices are transforming how chips are designed.
Silicon success is no longer determined by transistor counts alone, but by how efficiently data moves across increasingly… Read More
Synopsys at Design Automation Conference 2026
Synopsys is catalyzing the era of pervasive intelligence with comprehensive engineering solutions spanning silicon design, IP, and simulation and analysis. At this year’s Design Automation Conference (DAC), the company will showcase innovations transforming silicon and systems development for a wide range of applications… Read More
DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.
Accellera Systems Initiative invites the design and verification community to join us at the 2026 Design Automation Conference for a focused technical luncheon, “Embracing AI for Advanced Design and Verification,” on Tuesday, July 28, from 12:30–1:45 p.m. at the Long Beach Convention Center, Meeting Room 104C.
Artificial… Read More


ASML High-NA EUV is Not Ready for High-Volume Production