The growing demand for high-performance AI applications continues to drive innovation in CPU architecture design. As machine learning workloads, particularly convolutional neural networks (CNNs), become more computationally intensive, architects face the challenge of delivering performance improvements while maintaining… Read More
Relationships with IP Vendors
An animated panel discussion Design Automation Conference in June offered up a view of the state of RISC-V and open-source functional verification and a wealth of good material for a three-part blog post series.
Parts One and Two covered a range of topics from microcontroller versus more general-purpose processor versus running… Read More
Changing RISC-V Verification Requirements, Standardization, Infrastructure
A lively panel discussion about RISC-V and open-source functional verification highlighted this year’s Design Automation Conference. Part One looked at selecting a RISC-V IP block from a third-party vendor and investigating its functional verification process.
In Part Two, moderator Ron Wilson and Contributing Editor … Read More
The RISC-V and Open-Source Functional Verification Challenge
Most of the RISC-V action at the end of June was at the RISC-V Summit Europe, but not all. In fact, a group of well-informed and opinionated experts took over the Pavilion stage at the Design Automation Conference to discuss functional verification challenges for RISC-V and open-source IP.
Technology Journalist Ron Wilson and … Read More
Andes Technology is Expanding RISC-V’s Horizons in High-Performance Computing Applications
By: Dr. Charlie Su, President and CTO, Andes Technology Corp.
At Andes Technology, we are excited to share some of our latest advancements and insights into the growing role of RISC-V in several high-performance applications. According to the SHD Group report, “IP Market RISC-V Market Report: Application Forecasts in… Read More
TetraMem Integrates Energy-Efficient In-Memory Computing with Andes RISC-V Vector Processor
The rapid proliferation of artificial intelligence (AI) across a growing number of hardware applications has driven an unprecedented demand for specialized compute acceleration not met by conventional von Neumann architectures. Among the competing alternatives, one showing the greatest promise is analog in-memory computing… Read More
Unlocking the Future: Join Us at RISC-V Con 2024 Panel Discussion!
Are you ready to dive into the heart of cutting-edge computing? RISC-V Con 2024 is just around the corner, and we’re thrilled to invite you to a riveting panel discussion that promises to reshape your understanding of advanced computing. On June 11th, from 4:00 to 5:00 PM, at the prestigious DoubleTree Hotel in San Jose, California,… Read More
LIVE WEBINAR: RISC-V Instruction Set Architecture: Enhancing Computing Power
In the dynamic landscape of chip design, two trends stand out as game-changers: the rise of the RISC-V instruction set architecture (ISA) and the advent of Software Defined products. Today, we delve into why these trends are not just shaping the industry but propelling companies like Andes and Menta to the forefront of innovation.… Read More
Andes Technology: Pioneering the Future of RISC-V CPU IP
On September 13, 2021, Andes Technology Corporation successfully issued its GDR (Global Depositary Receipt) public offering on the Luxembourg Stock Exchange. At the time it made Andes the only international public RISC-V Instruction set architecture (ISA) CPU IP supplier. This allowed investors around the world to participate… Read More
A Rare Offer from The SHD Group – A Complimentary Look at the RISC-V Market
The web is a wonderful place to find information on almost any topic. While top-level information is easy to find, a deep dive often requires the services of a market research firm. These organizations specialize in “going deep” on many technology topics, offering insights not available with a Google search. And these services… Read More