3DIC Design from Concept to Silicon 800X100
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From Now to 2025 – Changes in Store for Hardware-Assisted Verification

From Now to 2025 – Changes in Store for Hardware-Assisted Verification
by Daniel Nenni on 01-12-2022 at 6:00 am

Jean Marie Brunet

Lauro Rizzatti recently interviewed Jean-Marie Brunet, vice president of product management and product engineering in the Scalable Verification Solution division at Siemens EDA, about why hardware-assisted verification is a must have for today’s semiconductor designs. A condensed version of their discussion is below.… Read More


DAC 2021 Wrap-up – S2C turns more than a few heads

DAC 2021 Wrap-up – S2C turns more than a few heads
by Ron Green on 12-20-2021 at 10:00 am

IMG 7547

Now that the 58th Design Automation Conference held this year in San Francisco has concluded, we take a minute to look back at the results and ascertain what it meant for our company.

Unfortunately, many popular tradeshows held in the time of Covid have suffered a drop in attendance, and DAC was no exception. Despite this however,… Read More


A Next-Generation Prototyping System for ASIC and Pre-Silicon Software Development

A Next-Generation Prototyping System for ASIC and Pre-Silicon Software Development
by Kalar Rajendiran on 12-05-2021 at 6:00 am

Corigine Prototyping Systems

Every now and then, disruptive technology is brought to market, challenging the way things have been done to that point. We are all familiar with many such technologies. The rhetorical question is, how many of us were aware, recognized and acknowledged those technologies before they became well established? For example, a startup… Read More


Prototypical II PDF is now available!

Prototypical II PDF is now available!
by Daniel Nenni on 08-02-2021 at 6:00 am

Prototypical II

Our latest book has finally been published! A PDF version of “Prototypical II – The Practice of FPGA Prototyping for SoC Design” is now available in the SemiWiki book section. The first book “Prototypical – The Emergence of FPGA Prototyping for SoC Design” was published in 2016 and a lot … Read More


S2C Raises the Bar for High Capacity, High-Performance FPGA Prototyping

S2C Raises the Bar for High Capacity, High-Performance FPGA Prototyping
by Daniel Nenni on 12-29-2020 at 10:00 am

Logic Matrix

It should come as no surprise that S2C would step out in front with a high-density FPGA prototyping hardware platform for users who would like to scale to large numbers of FPGAs and high performance.  That’s exactly what they have done with their new Prodigy Logic Matrix family of FPGA prototyping products that S2C announced in December. … Read More


The Big Three Weigh in on Emulation Best Practices

The Big Three Weigh in on Emulation Best Practices
by Mike Gianfagna on 08-18-2020 at 10:00 am

Emulation Best Practices

As software content increases in system-on-chip and system-in-package designs, emulation has become a critical enabling technology for the software team. This technology offers software developers the opportunity to verify their code in against a high-fidelity model of the target system that actually executes fast enough… Read More


Webinar Replay – Insight into Creating a Common Testbench

Webinar Replay – Insight into Creating a Common Testbench
by Tom Simon on 06-04-2020 at 6:00 am

Common Tesbanch

These days the verification process starts right when the design process begins, and it keeps going well past the end of the design phase. Simulation is used extensively at every stage of design and can go a long way to help validate a design. However, for many types of designs, especially those that process complex data streams, … Read More


Mentor Masterclass on ML SoC Design

Mentor Masterclass on ML SoC Design
by Bernard Murphy on 03-24-2020 at 6:00 am

ML algo design

I was scheduled to attend the Mentor tutorial at DVCon this year. Then coronavirus hit, two big sponsors dropped out and the schedule was shortened to three days. Mentor’s tutorial had to be moved to Wednesday and, as luck would have it, I already had commitments on that day. Mentor kindly sent me the slides and audio from the meeting… Read More


Anirudh Keynote at CDNLive 2019

Anirudh Keynote at CDNLive 2019
by Bernard Murphy on 05-08-2019 at 7:00 am

Anirudh Devgan (President of Cadence), gave the third keynote at CDNLive Silicon Valley this year. He has clearly become adept in this role. He has a big, but supportable vision for Cadence across markets and technologies and he’s become a master of the annual tech reveals that I usually associate with keynotes.


Anirudh opened … Read More