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Prototyping with the Latest and Greatest Xilinx FPGAs

Prototyping with the Latest and Greatest Xilinx FPGAs
by Daniel Nenni on 11-11-2020 at 6:00 am

Prototyping with the Latest and Greatest Xilinx FPGAs

I was reading the S2C press release announcing their new FPGA prototyping platform based on the Xilinx UltraScale+ VU19P FPGA, and how the new FPGA will accelerate billion gate FPGA prototyping, and I was struck by the stunning implications of this announcement.  Not that billion gate SoC designs can now be prototyped with FPGAs,… Read More


The Future of FPGAs

The Future of FPGAs
by Kris Kachris on 11-08-2020 at 10:00 am

The Future of FPGAs

On June 1, 2015 Intel and Altera announced , that they had entered into a definitive agreement under which Intel would acquire Altera for $16.7 billions. That was a major milestone for the FPGA community as Xilinx and Altera were the main FPGA vendors.

After the official announcement of AMD to acquire Xilinx, there is a huge… Read More


AMD and Intel Update with Xilinx

AMD and Intel Update with Xilinx
by Daniel Nenni on 11-06-2020 at 10:00 am

AMD Xilinx Acquisition

The AMD acquisition of Xilinx is certainly big news but as an insider looking at the media coverage I think there are a few more points to consider. While most of the coverage has been positive there will always be negatives and we can look at that as well.

Intel acquired Altera in 2015 for $16.7B at a 50% premium which was a major disruption… Read More


Reverse-engineering the First FPGA Chip Xilinx XC2064

Reverse-engineering the First FPGA Chip Xilinx XC2064
by Ken Shirriff on 09-16-2020 at 6:00 am

Xilinx XC2064

A Field-Programmable Gate Array (FPGA) can implement arbitrary digital logic, anything from a microprocessor to a video generator or crypto miner. An FPGA consists of many logic blocks, each typically consisting of a flip flop and a logic function, along with a routing network that connects the logic blocks. What makes an FPGA… Read More


Webinar: Maximize Performance Using FPGAs with PCIe Gen5 Interfaces

Webinar: Maximize Performance Using FPGAs with PCIe Gen5 Interfaces
by Mike Gianfagna on 09-01-2020 at 10:00 am

Maximize Maximize Performance Using FPGAs with PCIe Gen5 Interfaces

FPGAs are a popular method to implement hardware accelerators for applications such as AI/ML, SmartNICs and storage acceleration. PCIe Gen5 is a high bandwidth communication protocol that is a key enabler for this class of applications. Putting all this together presents significant demands on the FPGA for performance and … Read More


Xilinx Moves from Internal Flow to Commercial Flow for IP Integration

Xilinx Moves from Internal Flow to Commercial Flow for IP Integration
by Daniel Payne on 08-25-2020 at 10:00 am

Xilinx IP min

I’ll never forget first learning about Xilinx when they got started back in 1984, because the concept of a Field Programmable Gate Array (FPGA) was so simple and elegant, it was rows and columns of logic gates that a designer could program to perform any logic function, then connect that logic to IO pads to drive other chips … Read More


Moving to Deeply Scaled Nodes for Power? There is a Better Way

Moving to Deeply Scaled Nodes for Power? There is a Better Way
by Mike Gianfagna on 08-24-2020 at 10:00 am

AGGIOS Definition

Did you know you can save 30% to 60% power without spending a fortune on a process migration? There is a better way than moving to deeply scaled nodes for power. Read on…

Have you heard of AGGIOS? You will. The name stands for AGGregated IO Systems, and a team of ex ARM and Qualcomm engineers are re-inventing power management. I’ll explain… Read More


WEBINAR: Security Verification of Root of Trust for Xilinx

WEBINAR: Security Verification of Root of Trust for Xilinx
by Bernard Murphy on 08-07-2020 at 6:00 am

root of trust min

Tortuga Logic is hosting a webinar on Tuesday, August 18th from 12 to 1PM PDT, in which Xilinx will present their experiences in using the Tortuga Logic Radix-S and Radix-M products for security verification of root of trust in their advanced SoC FPGAs. REGISTER HERE to attend the webinar.

SECURITY CHALLENGES
In general security… Read More


Radiation Tolerance. Not Just for ISO 26262

Radiation Tolerance. Not Just for ISO 26262
by Bernard Murphy on 04-30-2020 at 6:00 am

Satellite

Years before ISO 26262 (the auto safety standard) existed, a few electronics engineers had to worry about radiation hardening, but not for cars. Their concerns were the same we have today – radiation-induced single event effects (SEE) and single event upsets (SEU). SEEs are root-cause effects – some form of radiation, might be… Read More


Mentor Masterclass on ML SoC Design

Mentor Masterclass on ML SoC Design
by Bernard Murphy on 03-24-2020 at 6:00 am

ML algo design

I was scheduled to attend the Mentor tutorial at DVCon this year. Then coronavirus hit, two big sponsors dropped out and the schedule was shortened to three days. Mentor’s tutorial had to be moved to Wednesday and, as luck would have it, I already had commitments on that day. Mentor kindly sent me the slides and audio from the meeting… Read More