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Intel and the EUV Shortage

Intel and the EUV Shortage
by Scotten Jones on 04-13-2022 at 10:00 am


In my “The EUV Divide and Intel Foundry Services” article available here, I discussed the looming EUV shortage. Two days ago, Intel announced their first EUV tool installed at their new Fab 34 in Ireland is a tool they moved from Oregon. This is another indication of the scarcity of EUV tools.

I have been tracking EUV system production… Read More

Can Intel Catch TSMC in 2025?

Can Intel Catch TSMC in 2025?
by Scotten Jones on 04-11-2022 at 6:00 am


At the ISS conference held from April 4th through 6th I presented on who I thought would have the leading logic technology in 2025. The following is a write up of that presentation.

ISS was a virtual conference in 2021 and I presented on who currently had logic leadership and declared TSMC the clear leader. Following that conference,… Read More

Intel Best Practices for Formal Verification

Intel Best Practices for Formal Verification
by Daniel Nenni on 04-07-2022 at 6:00 am

formal dynamic verification comparison

Dynamic event-based simulation of RTL models has traditionally been the workhorse verification methodology.  A team of verification engineers interprets the architectural specification to write testbenches for various elements of the design hierarchy.  Test environments at lower levels are typically exercised then … Read More

The EUV Divide and Intel Foundry Services

The EUV Divide and Intel Foundry Services
by Scotten Jones on 03-23-2022 at 10:00 am

Intel IDM 2.0 Process Roadmap
The EUV Divide

I was recently updating an analysis I did last year that looked at EUV system supply and demand, while doing this I started thinking about Intel and their Fab portfolio.

If you look at Intel’s history as a microprocessor manufacturer, they are typically ramping up their newest process node (n), in volume production… Read More

Intel Evolution of Transistor Innovation

Intel Evolution of Transistor Innovation
by Daniel Nenni on 03-03-2022 at 10:00 am

Intel Transistor Innovations 1971

Intel recently released an exceptional video providing an insightful chronology of MOS transistor technology.  Evolution of Transistor Innovation is a five-minute audiovisual adventure, spanning 50 years of Moore’s Law.  Some of the highlights are summarized below, with a few screen shot captures – the full video is definitely… Read More

Intel’s Investor Day – Nothing New

Intel’s Investor Day – Nothing New
by Doug O'Laughlin on 02-27-2022 at 6:00 am

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Intel’s big investor day was anything but big. The stock reacted poorly, down 5% on a day that was a widespread sell-off anyways.

I want to briefly summarize what matters for the stock. There was very little incremental news to the technology roadmap, and the financial outlook was underwhelming, to say the least.

The revenue guide… Read More

Intel 2022 Investor Meeting

Intel 2022 Investor Meeting
by Scotten Jones on 02-21-2022 at 6:00 am

Figure 1 Process Innovations

Last Thursday Intel held their investors meeting, in this write up I wanted to focus on my areas of coverage/expertise, process technology and manufacturing.

Technology Development presented by Ann Kelleher

Last year Intel presented their Intel Accelerated plan and, in this meeting, we got a review of where Intel stands on that… Read More

The Intel Foundry Ecosystem Explained

The Intel Foundry Ecosystem Explained
by Daniel Nenni on 02-15-2022 at 5:00 am

Intel Tower Semiconductor Acquisition

Exciting times for the semiconductor industry! Last week Intel announced a billion dollar fund to build a foundry ecosystem and today Intel announced they are acquiring foundry Tower Semiconductor for $5.6 billion dollars, WOW! Some people doubted Intel’s commitment to the foundry market this time. I think we can now put that… Read More

Intel Discusses Scaling Innovations at IEDM

Intel Discusses Scaling Innovations at IEDM
by Scotten Jones on 12-14-2021 at 6:00 am

Intel at IEDM Slides Page 1

Standard Cell Scaling

Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.

Figure 1 illustrates the dimensions of a standard cell.

 Figure 1. Standard Cell Dimensions.

 From figure 1 we can see that shrinking standard cell sizes requires… Read More

Intel Architecture Day – Part 2: GPUs, IPUs, XeSS, OpenAPI

Intel Architecture Day – Part 2: GPUs, IPUs, XeSS, OpenAPI
by Tom Dillinger on 09-01-2021 at 10:00 am

Ponte Vecchio


At the recent Intel Architecture Day presentations, a breadth of roadmap plans were provided – an earlier article focused on the x86 client and data center cores and products.  This article focuses on the GPU and IPU announcements.

Xe Graphics Core

The Intel GPU architecture for embedded, discrete, and data center… Read More