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Q2FY24TessentAI 800X100
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Solido Siemens and the University of Saskatchewan

Solido Siemens and the University of Saskatchewan
by Daniel Nenni on 07-03-2024 at 10:00 am

Solido USask 2024

In my 40 years, I have worked for dozens of companies and just about everyone of them was acquired. Some of the acquisitions were accretive and some were not. Probably the best and most accretive one would be the Solido acquisition by Siemens EDA in 2017. I worked for Solido for ten years reporting to CEO Amit Gupta. I handled Taiwan … Read More


Three New Circuit Simulators from Siemens EDA

Three New Circuit Simulators from Siemens EDA
by Daniel Payne on 06-27-2024 at 10:00 am

solido simulation suite

The week before DAC I had the privilege to take a video call with Pradeep Thiagarajan – Product Manager, Simulation, Custom IC Verification at Siemens EDA to get an update on new simulation products. I’ve been following Solido for years now and knew that they were an early adopter of ML for Monte Carlo simulations with SPICE users.… Read More


Siemens Provides a Complete 3D IC Solution with Innovator3D IC

Siemens Provides a Complete 3D IC Solution with Innovator3D IC
by Mike Gianfagna on 06-27-2024 at 6:00 am

Siemens Provides a Complete 3D IC Solution with Innovator3D IC

Heterogeneous multi-die integration is gaining more momentum all the time. The limited roadmap offered by Moore’s Law monolithic, single-die integration has opened the door to a new era of more-than-Moore heterogeneous integration. The prospects offered by this new design paradigm are exciting and the entire ecosystem is… Read More


New EDA Tool for 3D Thermal Analysis

New EDA Tool for 3D Thermal Analysis
by Daniel Payne on 06-26-2024 at 10:00 am

3D IC cross section min

An emerging trend with IC design is the growing use of chiplets and even 3D IC designs, as the disaggregated approach has some economic and performance benefits over a single SoC. There are thermal challenges with using chiplets and 3D IC designs, so that means that thermal analysis has become more important. I just spoke with Michael… Read More


Siemens Hardware-Assisted Verification at the 2024 Design Automation Conference

Siemens Hardware-Assisted Verification at the 2024 Design Automation Conference
by Daniel Nenni on 06-20-2024 at 8:00 am

DAC 2024 Banner

Visitors to Siemens’ booth (#2521) at the 61st Design Automation Conference (DAC) will see on display the Veloce™ CS system that unifies hardware emulation, enterprise prototyping and software prototyping into one hardware-assisted verification and validation platform.

The display will feature the three single-blade … Read More


Something new in High Level Synthesis and High Level Verification

Something new in High Level Synthesis and High Level Verification
by Daniel Payne on 06-11-2024 at 10:00 am

catapult covercheck min

As SoC complexities continue to expand to billions of transistors, the quest for higher levels of design automation also rises. This has led to the adoption of High-Level Synthesis (HLS), using design languages such as C++ and SystemC, which is more productive than traditional RTL design entry methods. In the RTL approach there… Read More


3DIC Verification Methodologies for Advanced Semiconductor ICs

3DIC Verification Methodologies for Advanced Semiconductor ICs
by Kalar Rajendiran on 06-06-2024 at 10:00 am

3DIC Flow Challenges

At the recent User2user conference, Amit Kumar, Principal Hardware Engineer, Microsoft, shared the company’s experience from building a 3DIC SoC and highlighted Siemens EDA tools that were used. The following is a synthesis of core aspects of that talk.

3DIC Challenges

Despite the numerous advantages of 3DIC technology, its… Read More


Is it time for PCB auto-routing yet?

Is it time for PCB auto-routing yet?
by Daniel Payne on 06-04-2024 at 10:00 am

PCB routing min

PCB designers have been using manual routing for decades now, so when is it time to consider adding interactive routing technologies to become more productive? Manually routing traces to connect components will take time from a skilled team member and involves human judgement that will introduce errors. When a design change … Read More


How does your EDA supplier ensure software quality?

How does your EDA supplier ensure software quality?
by admin on 05-30-2024 at 10:00 am

fig1 anacov components

In the fast-paced world of electronic design automation (EDA) software development, maintaining high code quality while adhering to tight deadlines is a significant challenge. Code coverage, an essential metric in software testing, measures the extent to which a software’s source code is executed in tests. High code… Read More


New Tool that Synthesizes Python to RTL for AI Neural Network Code

New Tool that Synthesizes Python to RTL for AI Neural Network Code
by Daniel Payne on 05-21-2024 at 10:00 am

Catapult AI NN tool flow – Python to RTL

AI and ML techniques are popular topics, yet there are considerable challenges to those that want to design and build an AI accelerator for inferencing, as you need a team that understands how to model a neural network in a language like Python, turn that model into RTL, then verify that your RTL matches Python. Researchers from CERN,… Read More