WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 497
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 497
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
    [is_post] => 
)
            
WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 497
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 497
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
    [is_post] => 
)

Useful Skew in Production Flows

Useful Skew in Production Flows
by Tom Dillinger on 12-13-2019 at 6:00 am

The concept of applying useful clock skew to the design of synchronous systems is not new.  To date, the application of this design technique has been somewhat limited, as the related methodologies have been rather ad hoc, to be discussed shortly.  More recently, the ability to leverage useful skew has seen a major improvement,… Read More


Top Three Reasons to Attend the Synopsys Fusion Compiler Event!

Top Three Reasons to Attend the Synopsys Fusion Compiler Event!
by Daniel Nenni on 11-22-2019 at 10:00 am

As a professional semiconductor event attendee I can pretty much tell if an event will be successful by looking at the agenda. What I look for is simple, customer presentations. Not company presentations or partner presentations but actual customer case studies presented by name brand companies. For this event Google, Intel,… Read More


Synopsys Fusion Compiler Delivers ARM Hercules-Samsung 5LPE Design

Synopsys Fusion Compiler Delivers ARM Hercules-Samsung 5LPE Design
by Daniel Nenni on 11-15-2019 at 10:00 am

There were many interesting presentations at ARM TechCon this year besides the keynote addresses by Arm, which were truly stunning for content and production value. One very interesting presentation was the talk given in the afternoon of Wednesday, October 9, 2019, titled, Synopsys Fusion Compiler for Next Generation Arm HerculesRead More


Accelerating Functional Safety Verification

Accelerating Functional Safety Verification
by Bernard Murphy on 10-24-2019 at 6:00 am

FuSa Verification

Verifying a design for functional safety requirements for an IP or SoC per ISO 26262 is a complex process that can’t be encapsulated in one tool. Process complexities depend on whether the Tier1 or OEM is targeting safety-levels ASIL-A , B, C or D, where ASIL-D applies to anything truly safety-critical such as airbag controls or … Read More


Formal in the Field: Users are Getting More Sophisticated

Formal in the Field: Users are Getting More Sophisticated
by Bernard Murphy on 10-15-2019 at 5:00 am

Formal SIG 2019 meeting at Synopsys

Building on an old chestnut, if sufficiently advanced technology looks like magic, there are a number of technology users who are increasingly looking like magicians. Of course when it comes to formal, neither is magical, just very clever. The technology continues to advance and so do the users in their application of those methods.… Read More


Design Perspectives on Intermittent Faults

Design Perspectives on Intermittent Faults
by Bernard Murphy on 10-08-2019 at 5:00 am

Faults

Bugs are an inescapable reality in any but the most trivial designs and usually trace back to very deterministic causes – a misunderstanding of the intended spec or an incompletely thought-through implementation of some feature, either way leading to reliably reproducible failure under the right circumstances. You run diagnostics,… Read More


AI Hardware Summit, Report #3: Enabling On-Device Intelligence

AI Hardware Summit, Report #3: Enabling On-Device Intelligence
by Randy Smith on 10-03-2019 at 6:00 am

This is the third and final blog I have written about the recent AI Hardware Summit held at the Computer History Museum in Mountain View, CA. Day 1 of the conference was more about solutions in the data center, whereas Day 2 was primarily around solutions at the Edge. This presentation from Day 2 was given by Dr. Thomas Anderson, Head,… Read More


Webinar: Finding Your Way Through Formal Verification

Webinar: Finding Your Way Through Formal Verification
by Bernard Murphy on 10-01-2019 at 6:00 am

Finding your way through formal book

Formal verification has always appeared daunting to me and I suspect to many other people also. Logic simulation feels like a “roll your sleeves up and get the job done” kind of verification, easily understood, accessible to everyone, little specialized training required. Formal methods for many years remained the domain of … Read More


High-Speed PHY IP for Hyperscale Data Centers

High-Speed PHY IP for Hyperscale Data Centers
by Tom Dillinger on 09-25-2019 at 10:00 am

A new designation has recently entered the vernacular of the computing industry – a hyperscale data center.  The adjective hyperscale implies the ability of a computing resource to scale corresponding to increased workload, to maintain an appropriate quality of service.

The traditional enterprise data center is often characterized… Read More


5G and V2X

5G and V2X
by Bernard Murphy on 07-25-2019 at 5:00 am

Amid the glamor of autonomous vehicles and hot new ADAS features, communication between vehicles and other vehicles, pedestrians, cyclists or infrastructure, generally labeled V2X, doesn’t get as much press, perhaps because adoption is still pretty early or because it’s technology under the hood (quite literally) and therefore… Read More