All Things Semiconductor!
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I mentioned some time ago (a DVCon or two ago) that Accellera had started working on a standard to quantify IP security. At the time I talked about some of the challenges in the task but nevertheless applauded the effort. You’ve got to start somewhere and some way to quantify this is better than none, as long as it doesn’t deliver misleading… Read More
In the automotive space you can’t even get out of the starting gate without Functional Safety (FS). All electronic system that go into cars must have ISO 26262 certification. However, this is not something you slap on after the fact. From the ground up the requirements for ISO 26262 must be considered and the proper processes must… Read More
Bugs are an inescapable reality in any but the most trivial designs and usually trace back to very deterministic causes – a misunderstanding of the intended spec or an incompletely thought-through implementation of some feature, either way leading to reliably reproducible failure under the right circumstances. You run diagnostics,… Read More
We all know that cars are using processors for many tasks, but it is easy to fail to comprehend just how many there are in a typical modern car. Browsing through the Infineon AURIX automotive processor application guide, you can start to see just how pervasive processors are. The AURIX processors are specifically designed for automotive… Read More
This is the third and final blog I have written about the recent AI Hardware Summit held at the Computer History Museum in Mountain View, CA. Day 1 of the conference was more about solutions in the data center, whereas Day 2 was primarily around solutions at the Edge. This presentation from Day 2 was given by Dr. Thomas Anderson, Head,… Read More
Formal verification has always appeared daunting to me and I suspect to many other people also. Logic simulation feels like a “roll your sleeves up and get the job done” kind of verification, easily understood, accessible to everyone, little specialized training required. Formal methods for many years remained the Image Removed… Read More
A new designation has recently entered the vernacular of the computing industry – a hyperscale data center. The adjective hyperscale implies the ability of a computing resource to scale corresponding to increased workload, to maintain an appropriate quality of service.
The traditional enterprise data center is often characterized… Read More
Synopsys just announced the availability of their IP solution supporting CXL (Compute Express Link). This new protocol is going to be an important component for several applications expected to be shipping starting in 2021. CXL is an alternate protocol that runs on the same physical layer as PCI Express (PCIe). Among other usages,… Read More
Image Removed We all know (I hope) that security is important so we’re willing to invest time and money in this area but there are a couple of problems. First there’s no point in making your design secure if it’s not competitive and making it competitive is hard enough, so the great majority of resource and investment is going to go into… Read More
Amid the glamor of autonomous vehicles and hot new ADAS features, communication between vehicles and other vehicles, pedestrians, cyclists or infrastructure, generally labeled V2X, doesn’t get as much press, perhaps because adoption is still pretty early or because it’s technology under the hood (quite literally) and therefore… Read More
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Thermal-induced Reliability Challenges and Solutions for Advanced IC Design
Finding Your Way Through Verification (Text)
Concerned about IP security threats for your SoCs?
Achronix: Accelerate Data Processing Algorithms using FPGAs with 2D Network-on-Chip
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Thermal-induced Reliability Challenges and Solutions for Advanced IC Design
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Thermal-induced Reliability Challenges and Solutions for Advanced IC Design
Finding Your Way Through Verification (Text)
Concerned about IP security threats for your SoCs?
Achronix: Accelerate Data Processing Algorithms using FPGAs with 2D Network-on-Chip
PAVE360: Of SoCs, Digital Twins, and Validating Autonomous Vehicle Behavior
Thermal-induced Reliability Challenges and Solutions for Advanced IC Design
REPLAY: GPU-Powered SPICE: The Way Forward for Analog Simulation
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REPLAY: The Brave New World of Customized Memory
REPLAY: Embedded FPGA: The Fabric for Optimized Machine Learning
REPLAY: VLSI Design Methodology Development
REPLAY: Lightspeed Data Sync – Design Workspace Problems Solved!
REPLAY: Desinging Complex SoCs and Dealing with Multiple File Formats?
REPLAY: How ASIC/SoC Prototyping Solutions Can Help You!
REPLAY: Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso®
REPLAY: Taiwan ESD Workshop Recording
REPLAY: Reduce Risk and Improve Quality of AMS IP’s using AI-Powered Automated Timing Arc Prediction
REPLAY: Text: A Year of Breakfast Bytes by Paul McLellan (Free PDF Version)
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[11721] => ThemeHouse\XPress\XF\Entity\Thread Object
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better_recent_comments-2
Widget_Better_Recent_Comments Instance: 2Array
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[number] => 10
[avatar] =>
[date] => 1
[comment] => 1
[link] => 1
[display_widget_mobile] => 1
[rw_opt] => Array
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Widget_Better_Recent_Comments
Acceleration in a Heterogenous Compute Environment