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The Immensity of Software Development and the Challenges of Debugging (Part 3 of 4)

The Immensity of Software Development and the Challenges of Debugging (Part 3 of 4)
by Lauro Rizzatti on 10-03-2024 at 10:00 am

Immensity of SW development Part 3 Figure 1

Part 3 of this 4-part series analyzes methods and tools involved in debugging software at different layers of the software stack.

Software debugging involves identifying and resolving issues ranging from functional misbehaviors to crashes. The essential requirement for validating software programs is the ability to monitor… Read More


SystemVerilog Functional Coverage for Real Datatypes

SystemVerilog Functional Coverage for Real Datatypes
by Mariam Maurice on 10-03-2024 at 6:00 am

fig 1

Functional coverage acts as a guide to direct verification resources by identifying the tested and untested portions of a design. Functional coverage is a user-defined metric that assesses the extent to which the design specification, as listed by the test plan’s features, has been used. It can be used to estimate the presence… Read More


Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design

Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
by Kalar Rajendiran on 10-02-2024 at 10:00 am

OIP 2024 Synopsys TSMC

Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More


Is AI-Based RTL Generation Ready for Prime Time?

Is AI-Based RTL Generation Ready for Prime Time?
by Bernard Murphy on 10-02-2024 at 6:00 am

shutterstock 2495413145 min

In semiconductor design there has been much fascination around the idea of using large language models (LLMs) for RTL generation; CoPilot provides one example. Based on a Google Scholar scan, a little over 100 papers were published in 2023, jumping to 310 papers in 2024. This is not surprising. If it works, automating design creation… Read More


5 Expectations for the Memory Markets in 2025

5 Expectations for the Memory Markets in 2025
by Daniel Nenni on 10-01-2024 at 10:00 am

Expectations for the Memory Markets in 2025

TechInsights has a new memory report that is worth a look. It is free if you are a registered member which I am. HBM is of great interest and there is a section on emerging and embedded memories for chip designers. Even though I am more of a logic person, memory is an important part of the semiconductor industry. In fact, logic and memory

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Sondrel Redefines the AI Chip Design Process

Sondrel Redefines the AI Chip Design Process
by Mike Gianfagna on 10-01-2024 at 6:00 am

Sondrel Redefines the AI Chip Design Process

Designing custom silicon for AI applications is a particularly vexing problem. These chips process enormous amounts of data with a complex architecture that typically contains a diverse complement of heterogeneous processors, memory systems and various IO strategies. Each of the many subsystems in this class of chip will … Read More


Elevating AI with Cutting-Edge HBM4 Technology

Elevating AI with Cutting-Edge HBM4 Technology
by Kalar Rajendiran on 09-30-2024 at 10:00 am

HBM4 Compute Chiplet Subsystem

Artificial intelligence (AI) and machine learning (ML) are evolving at an extraordinary pace, powering advancements across industries. As models grow larger and more sophisticated, they require vast amounts of data to be processed in real-time. This demand puts pressure on the underlying hardware infrastructure, particularly… Read More


WEBINARS: Boost Your Simulation and Modeling Efficiency

WEBINARS: Boost Your Simulation and Modeling Efficiency
by Daniel Nenni on 09-29-2024 at 8:00 am

Primarius 2

Unlock the full potential of your semiconductor designs with Primarius’ cutting-edge solutions, designed to enhance accuracy, performance, and efficiency across various applications. Join us for a series of four exclusive webinars where we will dive deep into how our advanced tools can revolutionize workflows for… Read More


Podcast EP249: A Conversation with Dr. Jason Cong, the 2024 Phil Kaufman Award Winner

Podcast EP249: A Conversation with Dr. Jason Cong, the 2024 Phil Kaufman Award Winner
by Daniel Nenni on 09-27-2024 at 10:00 am

Dan is joined by Dr. Jason Cong, the Volgenau Chair for Engineering Excellence Professor at the UCLA Computer Science Department. He is the director of the Center for Domain-Specific Computing and the director of VLSI Architecture, Synthesis, and Technology Laboratory. Dr. Cong’s research interests include novel architectures… Read More


CEO Interview: Doug Smith of Veevx

CEO Interview: Doug Smith of Veevx
by Daniel Nenni on 09-27-2024 at 6:00 am

Veevx Team 23

Douglas Smith has focused his career on optimizing advanced technologies for high volume ASIC applications. He has led elite design teams at Motorola SPS then Broadcom for over 25 years. With 200+ successful tape outs generating $10B+ in revenue. Douglas left Broadcom to self-fund a startup focused on advanced memory technologies.… Read More