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Continuous Integration of UVM Testbenches

Continuous Integration of UVM Testbenches
by Daniel Nenni on 09-13-2021 at 6:00 am

UVM Report

In recent years, one of the hot topics in chip design and verification has been continuous integration (CI). Like many innovations in hardware development, it was borrowed from software engineering and the programming world. The concept is simple: all code changes from all developers are merged back into the main development… Read More


Uber, Lyft Fail their COVID-19 Test

Uber, Lyft Fail their COVID-19 Test
by Roger C. Lanctot on 09-12-2021 at 6:00 am

Uber Lyft Fail their COVID 19 Test

The COVID-19 pandemic taught many lessons and revealed various weaknesses in global supply chains and business models. The transportation industry was hit particularly hard as people stopped moving thereby taking down public transit, crashing rental car companies and airlines, and erasing the fleets of ride hailing operators.… Read More


Podcast EP37: AI on the Edge

Podcast EP37: AI on the Edge
by Daniel Nenni on 09-10-2021 at 10:00 am

Dan and Mike are joined by Rob Telson, VP of sales and marketing at BrainChip. Rob explores the various hardware requirements for AI applications and discusses the specific areas where BrainChip can provide substantial benefit. Power optimization and rapid system modification are discussed, among others.

The views, thoughts,… Read More


CEO Interview: Tim Ramsdale of Agile Analog

CEO Interview: Tim Ramsdale of Agile Analog
by Daniel Nenni on 09-10-2021 at 6:00 am

Tim Ramsdale Agile Analog

Tim joined Agile Analog shortly after its formation in 2017, alongside Founder, Michael Hulse, with a mission to change the way Analog IP was designed and delivered. Before joining Agile Analog as CEO, Tim served as General Manager, Imaging and Vision at Arm.  He has experience of delivering products in wireless, consumer, infrastructure… Read More


Design and Verification IP: Insights From a SmartDV Insider

Design and Verification IP: Insights From a SmartDV Insider
by Kalar Rajendiran on 09-09-2021 at 10:00 am

SmartDV Range of IP Offerings

Just as SmartTV has become a household term, SmartDV has become a well-known name within semiconductor design and verification circles. SmartDV™ Technologies is the proven and trusted choice for Smart Design IP and a range of Verification Solutions™ from Verification IP, including assertion-based and post-silicon validation… Read More


ASML is the key to Intel’s Resurrection Just like ASML helped TSMC beat Intel

ASML is the key to Intel’s Resurrection Just like ASML helped TSMC beat Intel
by Robert Maire on 09-09-2021 at 6:00 am

TSMC INTEL ASML Hurricane 1

-Intel’s access to high-NA EUV tools may be their elixir of life
-TSMC’s EUV adoption helped it vault faltering Intel & Samsung
-Maybe ASML should invest in Intel like Intel invested in ASML
-Shoe is on the other foot- But cooperation helps chip industry

Intel is dependent upon ASML for its entire future
If Intel… Read More


Can/Will NHTSA Rein in AVs Bad Boys?

Can/Will NHTSA Rein in AVs Bad Boys?
by Roger C. Lanctot on 09-08-2021 at 10:00 am

Autonomous Vehicle AV Bad Boys

There’s a new sheriff in town at the U.S. Department of Transportation in the form of Department Secretary Pete Buttigieg with an acting deputy in Acting Administrator Dr. Steve Cliff at the National Highway Traffic Safety Administration (NHTSA). NHTSA has served notice on bad boy Tesla CEO Elon Musk that it is investigating

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Verifications Horizons 2021, Now More Siemens

Verifications Horizons 2021, Now More Siemens
by Bernard Murphy on 09-08-2021 at 6:00 am

Aero DT min

In a discussion with Tom Fitzpatrick of Siemens EDA he recalled that their Verification Horizons newsletter started 17 years ago, back when they were Mentor. We’ve known about the Siemens acquisition for a while. The deal closed in March 2017, but it wasn’t until January 1, 2021 that the legal entity merger was complete. Which makes… Read More


Ansys IDEAS Digital Forum 2021 Offers an Expanded Scope on the Future of Electronic Design

Ansys IDEAS Digital Forum 2021 Offers an Expanded Scope on the Future of Electronic Design
by Daniel Nenni on 09-07-2021 at 10:00 am

IDEAS Banner ad

For those of you following the latest developments in electronic design it has become clear that the industry is transitioning through an inflection point that is shifting some of the ground rules of design. The increase in the speed and integration density in today’s systems are blurring the lines between chip design and system… Read More


White Paper: A Closer Look at Aging on Clock Networks

White Paper: A Closer Look at Aging on Clock Networks
by Tom Simon on 09-06-2021 at 6:00 am

Transistor Aging

We all know that designers work hard to reach design closure on SOC designs. However, what gets less attention from consumers is the effort that goes into ensuring that these chips will be fully operational and meeting timing specs over their projected lifetime. Of course, this is less important for chips used in devices with projected… Read More