WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 253
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 253
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
)
            
Ansys Banner 2023
WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 253
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 253
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
)

Chiplet Q&A with John Lee of Ansys

Chiplet Q&A with John Lee of Ansys
by Daniel Nenni on 05-19-2023 at 6:00 am

SNUG Panel

At the recent Synopsys Users Group Meeting (SNUG) I had the honor of leading a panel of experts on the topic of chiplets. One of those panelists was John Lee, Head of Electronics, Semiconductors and Optics at Ansys.

How is the signoff flow evolving and what is being done to help mitigate the growing signoff complexity challenge?

With multi-die, there are three key challenges that I’ll highlight and then talk about how we can best address those. First, the lines between silicon systems are blurring so we now have what we call multi-scale problems, where you’re looking at nanoscale effects such as cell heat at a transistor level, but then you need to go to centimeters or potentially meters scale effects as you look at multiple dies in the package and the electronic system.

The second one, I think is obvious, it’s Multiphysics. As you’re packing in more and higher signal speeds we generate more thermals, and you start stacking thermal dies on top of each other, generating heat. There are going to be severe mechanical effects that you also need to account for.

The third is a Multi-organization challenge. Typically, as we look across the industry or a customer base, you have a chip team, you have a package team, and some of the dies’, may not even be coming from your own company so there’s an organizational challenge that needs to be addressed.

We call that the 3Ms: Multi-scale, Multi-physics, and Multi-organization. And really to support that from a signoff standpoint, we have to start with the physics, right? If we’re not accurately modeling electromagnetics, not accurately modeling the thermals; the power integrity, signal integrity, and thermal integrity are a non-starter.

Thus, we need to provide an open and extensible platform. A platform implies scaling out very nicely in terms of computing, for a truly transistor design. How do you scale up that compute efficiently, open and extensible, which gets to the third part, which is a partnership, and the scale and scope of the problems that we’re solving around multi-die. It really requires a village. For example, the Ansys platform, working closely with the Synopsis platform is a great example of an open extensible ecosystem that better solves the challenges that we’ve seen together.

How is the increased learning curve for these Multiphysics effects being addressed?

It’s been pretty steep, to your point, Ansys has been doing mechanical thermal CFD simulation for over 50 years so it’s not that we don’t know how to solve these differential equations. If you look at, and specifically another example around thermal, typically the semiconductor companies might have a thermal team. That thermal was never really owned by the chip team or the IP team or the package team. Or if they did, they each had a different view of that. And then, in partnership with the , probably over the last five years it’s really about how do we take thermal into the workflow that’s silicon validated, that also is computational efficient.

As I mentioned earlier, we’ve seen our customer roadmaps with 2.5D and 3D.

There’s going to be a trillion transistor design pretty soon. And then a trillion transistors could mean 10 trillion geometries. And then from a thermal standpoint, we’d like to then mesh that into a hundred trillion elements, which of course is computationally impossible. And so how do we take that into a workable flow that can also be signed off, but also work in conjunction with 3D IC compilers. So, we have early system-level awareness. We do a lot of co-innovation with companies like Synopsys and TSMC.

We’ve used AI/ML, to guide us in how we can identify hotspots and how we can better optimize meshing. This has forced us to look more heavily at using reduced-order models to do abstractions so we can do quicker system-level simulations. And I’d say with all the experience that Ansys has around solving these equations we certainly feel like we have market leadership, though I’d say that we’re still only halfway there. We probably have another five years of hard work ahead of us to take these systems to the power and usability that we want them to be. And AI is going to be part of that, right? AI is already part of it, thankfully.

What is the customer’s view of the reliability challenge?

Well, it certainly has increased, and ’ example is a perfect example where reliability has become a primary concern, but it also extends if you’re building out a 5G base station that’s not in an air-conditioned warehouse or if you’re scaling out a huge data center. There are various use cases where reliability has an increasing problem and we’ve invested in this area.

We have a product called functional safety ISO 20620 compliance and building out, going from spreadsheets to formal systems for tracking reliability, which is extremely important. We’ve also put some focus on the software side. We had originally been investing in automotive software systems and making sure that they are fail-safe, but we’ve seen a lot of adoption from that product line into the automotive industry. But for my team, the most relevant work has really been with foundries like TSMC and making sure that we use computational physics to better dial in reliability.

Also Read:

Ansys Acquires Another!

Multiphysics Analysis from Chip to System

Checklist to Ensure Silicon Interposers Don’t Kill Your Design

HFSS Leads the Way with Exponential Innovation

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.