Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed-Signal Designs

Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed-Signal Designs
by Admin on 11-10-2021 at 12:00 am

Wednesday, November 10, 2021 | 10:00-10:40 a.m. PST

Analog designers appreciate the importance of tight communication between layout and design teams, yet with geographically dispersed teams this can be a big challenge.

Close collaboration between circuit designer and layout designer is essential for creating high-quality

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Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing

Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing
by Daniel Nenni on 10-19-2021 at 9:00 am

Cloud computing is going through a significant overhaul and continues to grow globally with increasing presence of hyperscale cloud providers for big data, high-performance computing (HPC), and analytics. In-house data centers are increasingly going off-premise, resulting in the co-location of data centers that manage… Read More


Keeping Latency to a Minimum with 400G/800G Ethernet IP

Keeping Latency to a Minimum with 400G/800G Ethernet IP
by Admin on 10-06-2021 at 12:00 am

Wednesday, October 6, 2021 | 10:00 -11:00 a.m. PDT

A large volume of data is required for high performance computing (HPC) workloads in data centers. As a result, enabling data processing between machines and servers across long reach channels at high rates becomes mandatory. SoCs for HPC applications such as data center, networking

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Synopsys’ ARC® DSP IP for Low-Power Embedded Applications

Synopsys’ ARC® DSP IP for Low-Power Embedded Applications
by Kalar Rajendiran on 09-30-2021 at 10:00 am

Key Applications Driving PPA Optimized Signal Processing

On Sep 20th, Synopsys announced an expansion of its DesignWare® ARC® Processor IP portfolio with new 128-bit ARC VPX2 and 256-bit ARC VPX3 DSP Processors targeting low-power embedded SoCs. In 2019, the company had launched a 512-bit ARC VPX5 DSP processor for high-performance signal processing SoCs. Due to the length, format… Read More


How Synopsys Interface IP and Arm Interoperate to Accelerate System IO and Memory Performance

How Synopsys Interface IP and Arm Interoperate to Accelerate System IO and Memory Performance
by Admin on 09-15-2021 at 12:00 am

In this webinar, Synopsys and Arm describe how their recent collaboration helps maximize system performance and shorten Arm-based SoC design cycles. Learn how to minimize HPC/data center SoC design risk and ensure end-to-end IP integration, using available Arm reference designs and interoperability reports. Find out how… Read More


Why Optimizing 3DIC Designs Calls for a New Approach

Why Optimizing 3DIC Designs Calls for a New Approach
by Synopsys Editorial on 09-02-2021 at 10:00 am

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The adoption of 3DIC architectures, while not new, is enjoying a surge in popularity as product developers look to their inherent advantages in performance, cost, and the ability to combine heterogeneous technologies and nodes into a single package. As designers struggle to find ways to scale with complexity and density limitations… Read More


Design a Time Interleaved ADC for 5G V2X Automotive Applications

Design a Time Interleaved ADC for 5G V2X Automotive Applications
by Admin on 08-30-2021 at 12:00 am

August 30 – 31, 2021
A Virtual Experience

Why Attend?

This 2-day virtual event is led by Professor Mohammed Ismail and Professor Mohammad Alhawari from the WINCAS Center of Excellence at Wayne State University. This event will be composed of lecture and lab sessions where analog design engineers will learn about the design,

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Sondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target

Sondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target
by Mike Gianfagna on 08-19-2021 at 10:00 am

Sondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target

Designing an ASIC is little bit like trying to hit the bullseye, in the dark. I’ve spent several decades in the ASIC business I can tell you this is what it’s like from first-hand experience. When the design team sets out to build a custom chip to make their product better, faster, more robust, etc. (pick the words you like), there is … Read More