Introduction of 2.5D and 3D multi-die based products are helping extend the boundaries of Moore’s Law, overcoming limitations in speed and capacity for high-end computational tasks. In spite of its critical function within the 3DIC paradigm, the interposer die’s role and related challenges are often neither fully comprehended… Read More
The challenges before semiconductor fabs are expansive and evolving. As the size of chips shrinks from nanometers to eventually angstroms, the complexity of the manufacturing process increases in response. To combat the complexity and sheer intricacy of semiconductor manufacturing, innovative software solutions are required.
The digital chip design flow carries with it an enormous wealth of untapped information regarding the health and status of your SoC design. The ability to efficiently mine this data provides chip designers with comprehensive visibility and actionable insights to uncover PPA opportunities. This webinar will introduce you to
Today’s advanced node chip designs are faced with many new complexities which require more verification, more validation and more analysis. The resulting data from these added steps has also grown exponentially and engineers need a way to efficiently analyze this information. The result is a new paradigm shift which has led
Synopsys’ SLM PVT Monitor (process detector, voltage monitor, temperature sensor) IP can collect voltage, temperature, and process parameters from different blocks within the IC in real time. These data can be analyzed and used to take meaningful action to optimize the performance of the chip at any stage of silicon lifecycle.
Dr. Nasib Naser brings over 35 years of experience in the field. His expertise spans the entire VLSI cycle from conception to chip design, with a strong focus on verification methodologies. For his 17 years at Synopsys, Dr. Naser have held senior management positions, leading North American Verification IP, managing Central … Read More
Since 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Systems. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America,
Since 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Systems. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America,
ASIP Designer enables the creation of custom vector DSPs for AI
Wednesday, May 22, 2024
4:00 – 6:00 pm CEST / 7:00 – 9:00 am PT
The revolution in AI triggers an increased awareness for application-specific instruction-set processors
Dan is joined by Mayukh Bhattacharya, Engineering, Executive Director, at Synopsys. Mayukh has been with Synopsys since 2003. For the first 14 years, he made many technical contributions to PrimeSim XA. Currently, he leads R&D teams for PrimeSim Design Robustness and PrimeSim Custom Fault products. He was one of the early… Read More
