From Process Learning to Production Control: Characterization for the Era of Heterogeneous Systems

From Process Learning to Production Control: Characterization for the Era of Heterogeneous Systems
by Kalar Rajendiran on 07-27-2026 at 6:00 am

Chiplets Have Changed the Test Paradigm

Every generation of semiconductor innovation has relied on one fundamental principle: before a technology can be manufactured at scale, it must first be understood. That understanding comes through characterization.

For decades, characterization enabled process learning. It helped engineers understand transistor behavior,… Read More


TSMC CoPoS Versus Intel EMIB Semiconductor Packaging

TSMC CoPoS Versus Intel EMIB Semiconductor Packaging
by Daniel Nenni on 07-24-2026 at 10:00 am

TSMC CoPos Versus Intel EMIB 2026

TSMC’s CoPoS, generally described as Chip-on-Panel-on-Substrate, and Intel’s EMIB, or Embedded Multi-die Interconnect Bridge, address the same strategic problem: integrating increasingly large, heterogeneous chiplet systems. However, they attack different physical constraints. CoPoS is an emerging panel-level … Read More


DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.

DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.
by Daniel Nenni on 07-13-2026 at 2:00 pm

DAC 2026 luncheon promo 400x400 (1)

Accellera Systems Initiative invites the design and verification community to join us at the 2026 Design Automation Conference for a focused technical luncheon, Embracing AI for Advanced Design and Verification,” on Tuesday, July 28, from 12:30–1:45 p.m. at the Long Beach Convention Center, Meeting Room 104C.

Artificial… Read More


The Packaging PDK Is the Missing Layer for Co-Packaged Optics

The Packaging PDK Is the Missing Layer for Co-Packaged Optics
by Moh Kolb on 07-07-2026 at 10:00 am

PKG PDK MISSION CPO JUne26

From Photonic Device Design to Electro-Optical Realization

Co-packaged optics will not scale through photonic device performance alone.

As AI infrastructure pushes bandwidth, power, latency, and reach to new limits, optics is moving closer to the compute engine. The industry is no longer asking only whether a photonic device… Read More


AI-native Virtual Chiplet Eco-systems: Shift Left, Shift Up, and Shift Out to accelerate Chiplet adoption

AI-native Virtual Chiplet Eco-systems: Shift Left, Shift Up, and Shift Out to accelerate Chiplet adoption
by raghu shankar on 06-22-2026 at 6:00 am

2026 Jun AI Native Virtual Chiplet ecosystem Shift Left Shift Up Shift Out

Systems-in-package (SIPs) with 2.5D and 3D heterogenous integration, consisting of multiple dies and chiplets deliver 10x more functionality than traditional monolithic chips. This capability enables innovative solutions for diverse needs in scientific computing, automotive, edge computing, and aerospace/defense.… Read More


Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools

Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools
by Daniel Nenni on 06-04-2026 at 6:00 am

synopsys intel linkedin update 1200x1200 v3

As advanced packaging becomes a critical enabler for next-generation semiconductor products, Intel continues to drive innovation through its Embedded Multi-die Interconnect Bridge (EMIB) technology. EMIB has emerged as a foundational packaging solution for heterogeneous integration, allowing multiple chiplets and… Read More


What Winemakers and Chip Designers Have in Common

What Winemakers and Chip Designers Have in Common
by Daniel Nenni on 05-22-2026 at 6:00 am

What Winemakers and Chip Designers Have in Common

Consider this a standout presentation at the Silicon Catalyst Spring Portfolio Update Meeting held yesterday at the Computer History Museum. Mahesh Tirupattur, CEO of Analog Bits, is a modern-day, multidimensional semiconductor hero and one of my trusted few. Analog Bits is a premier member of the semiconductor ecosystem,… Read More


Silicon Catalyst and Microelectronics US 2026

Silicon Catalyst and Microelectronics US 2026
by Daniel Nenni on 04-02-2026 at 10:00 am

Silicon Catalyst Microelectronics US 2026 Conference

The designation of Silicon Catalyst as the exclusive strategic partner for Microelectronics US 2026 represents a significant alignment between a leading semiconductor startup ecosystem and a rapidly growing U.S. microelectronics industry event. This partnership reflects broader trends in semiconductor innovation, … Read More


TSMC Technology Symposium 2026: Advancing the Future of Semiconductor Innovation

TSMC Technology Symposium 2026: Advancing the Future of Semiconductor Innovation
by Daniel Nenni on 03-16-2026 at 10:00 am

TSMC Technology Symposium 2026

One of my favorite times of the year is coming (sailing season) and my favorite event of the year is coming as the company I most respect will host the best international semiconductor networking event starting here in Silicon Valley.

The 32nd annual TSMC Technology Symposium represents one of the most influential events in the … Read More


Podcast EP335: The Far Reaching Impact of UCIe with Dr. Debendra Das Sharma

Podcast EP335: The Far Reaching Impact of UCIe with Dr. Debendra Das Sharma
by Daniel Nenni on 03-13-2026 at 10:00 am

Daniel is joined by Dr. Debendra Das Sharma, a Senior Fellow and Chief I/O architect in the Data Platforms and Artificial Intelligence Group at Intel. He is a member of the National Academy of Engineering (NAE), Fellow of IEEE, and Fellow of International Academy of AI Sciences. He is a leading expert on I/O subsystem and interface… Read More