ASML’s Path to Lithography Dominance—and the Coming Maskless Revolution

ASML’s Path to Lithography Dominance—and the Coming Maskless Revolution
by Daniel Nenni on 08-14-2026 at 6:00 am

ASML’s Path to Lithography Dominance—and the Coming Maskless Revolution

ASML’s dominance was not born from a single invention. It emerged from four decades of systems engineering, supplier orchestration, and repeated bets on lithographic transitions that competitors judged too expensive. Founded in 1984 as a Philips–ASM joint venture, the Dutch company first differentiated itself with modular… Read More


Comparing Intel EMIB and Intel Foveros

Comparing Intel EMIB and Intel Foveros
by Daniel Nenni on 08-12-2026 at 10:00 am

Comparing Intel EMIB and Intel Foveros SemiWiki

Intel EMIB and Intel Foveros are advanced semiconductor-packaging technologies designed to combine multiple silicon dies, or chiplets, within one processor package. Both support heterogeneous integration: manufacturers can build different functions using the process technology best suited to each one, then connect … Read More


Imec Unlocks System-Level III-V Chiplet Integration on Si-CMOS with Advanced 300mm RF Silicon Interposer Platform

Imec Unlocks System-Level III-V Chiplet Integration on Si-CMOS with Advanced 300mm RF Silicon Interposer Platform
by Daniel Nenni on 08-05-2026 at 6:00 am

Imec Unlocks System Level III V Chiplet Integration on Si CMOS

As wireless communication systems evolve toward 6G, satellite connectivity, advanced radar, and high-performance sensing applications, the integration of heterogeneous semiconductor technologies has become a critical challenge. Silicon CMOS remains the dominant platform for digital processing and system control,… Read More


Synopsys Demonstrates Leadership in AI-Powered Engineering at 2026 DAC Chips to Systems Conference

Synopsys Demonstrates Leadership in AI-Powered Engineering at 2026 DAC Chips to Systems Conference
by Daniel Nenni on 08-03-2026 at 10:00 am

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Purple was in fashion at the 2026 Design Automation Conference, where Synopsys reinforced its position at the forefront of AI-powered engineering. Under the conference’s “Chips to Systems” theme, the company showcased intelligent, end-to-end technologies designed to help the semiconductor industry manage unprecedented… Read More


From Process Learning to Production Control: Characterization for the Era of Heterogeneous Systems

From Process Learning to Production Control: Characterization for the Era of Heterogeneous Systems
by Kalar Rajendiran on 07-27-2026 at 6:00 am

Chiplets Have Changed the Test Paradigm

Every generation of semiconductor innovation has relied on one fundamental principle: before a technology can be manufactured at scale, it must first be understood. That understanding comes through characterization.

For decades, characterization enabled process learning. It helped engineers understand transistor behavior,… Read More


TSMC CoPoS Versus Intel EMIB Semiconductor Packaging

TSMC CoPoS Versus Intel EMIB Semiconductor Packaging
by Daniel Nenni on 07-24-2026 at 10:00 am

TSMC CoPos Versus Intel EMIB 2026

TSMC’s CoPoS, generally described as Chip-on-Panel-on-Substrate, and Intel’s EMIB, or Embedded Multi-die Interconnect Bridge, address the same strategic problem: integrating increasingly large, heterogeneous chiplet systems. However, they attack different physical constraints. CoPoS is an emerging panel-level … Read More


DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.

DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.
by Daniel Nenni on 07-13-2026 at 2:00 pm

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Accellera Systems Initiative invites the design and verification community to join us at the 2026 Design Automation Conference for a focused technical luncheon, Embracing AI for Advanced Design and Verification,” on Tuesday, July 28, from 12:30–1:45 p.m. at the Long Beach Convention Center, Meeting Room 104C.

Artificial… Read More


The Packaging PDK Is the Missing Layer for Co-Packaged Optics

The Packaging PDK Is the Missing Layer for Co-Packaged Optics
by Moh Kolb on 07-07-2026 at 10:00 am

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From Photonic Device Design to Electro-Optical Realization

Co-packaged optics will not scale through photonic device performance alone.

As AI infrastructure pushes bandwidth, power, latency, and reach to new limits, optics is moving closer to the compute engine. The industry is no longer asking only whether a photonic device… Read More


AI-native Virtual Chiplet Eco-systems: Shift Left, Shift Up, and Shift Out to accelerate Chiplet adoption

AI-native Virtual Chiplet Eco-systems: Shift Left, Shift Up, and Shift Out to accelerate Chiplet adoption
by raghu shankar on 06-22-2026 at 6:00 am

2026 Jun AI Native Virtual Chiplet ecosystem Shift Left Shift Up Shift Out

Systems-in-package (SIPs) with 2.5D and 3D heterogenous integration, consisting of multiple dies and chiplets deliver 10x more functionality than traditional monolithic chips. This capability enables innovative solutions for diverse needs in scientific computing, automotive, edge computing, and aerospace/defense.… Read More


Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools

Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools
by Daniel Nenni on 06-04-2026 at 6:00 am

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As advanced packaging becomes a critical enabler for next-generation semiconductor products, Intel continues to drive innovation through its Embedded Multi-die Interconnect Bridge (EMIB) technology. EMIB has emerged as a foundational packaging solution for heterogeneous integration, allowing multiple chiplets and… Read More