SoC design these days is largely about assembling externally developed semiconductor IP with a small amount of differentiated content. Only companies who have to adopt new processes instantly develop a lot of their own IP. It makes more sense to license it. Partially because there is not a lot of differentiation in standards-based IP (they conform or they don’t) and partially because they can be very difficult to design. Not every design team could design a DDR4 PHY even if they decided it was a wise investment of time and money.
But bringing IP into a company is itself a challenge: by definition, nobody in the company understands the details since it was created by a third party. Even if that third party turns out to be part of the same company based in, say, India, it is only a marginal improvement over a true arms’ length relationship.
Concept Engineering’s Starvision Pro is a tool that can be used for a broad range of applications, but one of them is to bring IP into a group and make it easy for engineers to find their way around it, start to make appropriate changes and so on. Of course saying IP almost makes it sound like it is a single file that is just dropped into the design but, of course, in reality it is thousands and perhaps tens of thousands of files: layout, netlist, Verilog, verification IP, scripts and more. Modern practice is to put the whole design into some sort of design data management system such as Cliosoft or Methodics.
One feature of Starvision is that it is extensible. EDA Direct, who are Concept Engineering’s US distributor, are also the distributor for Cliosoft’s SOS design data management system. Anis Weldon, one of the FAEs there, used the extensibility to integrate the two products so making importing IP, especially complex IP, much smoother.
For example, here an editor is being opened directly on an SOS repository, bringing up the netlist for a block directly in Starvision’s netlist viewer.
Another problem is that designers typically get the PDKs or Spice designs directly from the foundry and have no way to view them. The PDK viewer button can open the transistor level PDKs.
One area of complexity in IPs is that they often have multiple clock domains, possibly very large numbers of them. The clock tree analyzer button can instantly calculate the number of clock domains and show them in a graphical form.
The links are not all one way. Data such as the primitive and module count for each block are maintained for each version of the design that is checked in, and updated whenever there is a new checkin. This doesn’t just give the total number of primitives but keeps a separate total for each one.
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The precise details of the functionality are not that important. It is the integration of Starvision with the underlying version control that makes for a powerful tool, and a lot less cumbersome than it would be to have to use the two tools separately, manually invoking whatever functionality is needed in one before switching to the other.