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Design to Layout Collaboration Mixed Signal

Design to Layout Collaboration Mixed Signal
by Tom Simon on 04-07-2022 at 10:00 am

When talking about today’s sophisticated advanced node designs it’s easy to first think about the digital challenges. Yet, the effort to design the needed analog and mixed signal blocks for them should not be underestimated. The need for high speed clocks, high frequency RF circuits and high bit rate IOs makes the analog portions, particularly on FinFET nodes, complex and difficult. Analog design has in reality maintained its importance to SOC success over time. Indeed, the facts show growing numbers of analog and AMS circuit and layout designers working in teams around the world. Collaboration within and among these teams has become a primary concern.

There is a changing analog tool landscape too. Custom Compiler from Synopsys is making significant inroads into the previously monolithic custom IC design market. Synopsys reports that there are now nearly 200 companies using Custom Compiler. This, in conjunction with Synopsys’ own internal usage for the development their commanding analog IP portfolio, means that there are literally thousands of seats in use today and the numbers are growing. In a recent webinar by Synopsys and Cliosoft, a leading design data management solution provider, Synopsys cites increased design efficiency as the key to their on-going success. The webinar titled “Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed Signal Designs” touts the efficiencies added by integration with Cliosoft for design collaboration.

One might assume that this is just about checking files in and out so they can be edited safely. However, the webinar goes into detail about some pretty important aspects of the integration of Cliosoft SOS and Synopsys Custom Compiler. They specifically highlight the signoff review features. It’s important to note that circuit designers and layout engineers working on the same project might be sitting halfway around the world from each other. The integration described in the webinar offers sophisticated features so that one team can add notation to areas within a design, including highlighting specific areas of the design graphically to help communicate changes that might be needed. The Cliosoft SOS integration allows this collaboration activity right inside of the Custom Compiler user interface and directly on the design.

Cliosoft integration with Custom Compiler
Cliosoft integration with Custom Compiler for Collaboration

The webinar has an overview that shows how Cliosoft SOS capabilities can be used for design/layout collaboration and closure. The four elements of this are managing the design, facilitating collaboration, offering insight through analysis and finally making reuse possible.

Design data management includes revision control as you would expect. It offers release and variant management. Data security and access controls are provided as well. It also contains features that help to optimize network and disk storage usage.

The collaboration element covers support for remote cache servers with automatic synchronization. Underlying this are mechanisms that provide secure and efficient data transfer between sites.

The analysis features can produce design audit reports. It can also be used to spot schematic/layout differences. There are also reports on the changes made between releases or over time on designs. All of this helps manage and track the design process.

The fourth category is reuse, while long sought after, has in practice proven challenging. Cliosoft SOS helps companies effectively locate and reuse designs. Customers can create their own IP catalog. When there are fixes and releases to IP in the catalog, they are propagated so everyone stays up to date. The net effect is to increase productivity.

The webinar covers examples of each of these elements. Also, it includes a demo that shows how Cliosoft SOS is used directly inside of the Custom Compiler GUI for several of the tasks mentioned above to improve collaboration. The full webinar can be viewed on the Synopsys website.

Also read:

Synopsys Tutorial on Dependable System Design

Synopsys Announces FlexEDA for the Cloud!

Use Existing High Speed Interfaces for Silicon Test

 

 

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