WP_Term Object
    [term_id] => 57
    [name] => MunEDA
    [slug] => muneda
    [term_group] => 0
    [term_taxonomy_id] => 57
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 28
    [filter] => raw
    [cat_ID] => 57
    [category_count] => 28
    [category_description] => 
    [cat_name] => MunEDA
    [category_nicename] => muneda
    [category_parent] => 157

56th DAC – In Depth Look at Analog IP Migration from MunEDA

56th DAC – In Depth Look at Analog IP Migration from MunEDA
by Tom Simon on 07-31-2019 at 10:00 am

Every year at DAC, in addition to the hubbub of the exhibit floor and the relatively short technical sessions, there are a number of tutorials that dive in depth into interesting topics. At the 56th DAC in Las Vegas this year, MunEDA offered an interesting tutorial on Analog IP migration and optimization. This is a key issue for large and small companies. Digital IP migration is a fairly well bounded problem, making digital IP reuse a common activity. Though no less important, analog IP has been more difficult to adapt to new processes and new foundries. The 4 hour MunEDA tutorial was rich with technical content and real life case studies from Fraunhofer, inPlay Technologies, Rohm and STMicroelectronics. As always it is way more interesting to hear about design tool experiences from customers.

Michael Pronath from MunEDA started off the tutorial by discussing tools and methodologies for analog IP migration. MunEDA addresses issues in full custom design, which includes memories, custom cells, RF, and of course, analog. There are many challenges in this domain, including difficult design trade-offs, and design for yield & aging. Their migration flow includes SPT, for schematic porting. It handles many of the tedious and error prone steps involved in moving a design. The ported schematic can then be sized and tuned for the new technology with MunEDA’s WiCkeD sizing and tuning tools. WiCkeD stands for their Worst Case Distance optimization and analysis techniques. The final step is applying the WiCkeD based analysis and verification tools to ensure proper operation and performance of the finished design. This can include accounting for processes parameters, global and mismatch variation, reliability and more.

I found the portion of the tutorial given by Rohm’s Hidekazu Kojima particularly interesting. Rohm is a company that has been innovating semiconductor products since the late 1950’s. Their IP group uses MunEDA products to tailor their IP to the individual product group needs. They rely heavily on MunEDA WiCkeD tools for this. Hidekazu compared the flow they use to a traditional optimization flow. The main problem he highlighted with other flows is that there can be many iterations, where each small change requires reverification of all the performance specifications. MunEDA’s WiCkeD Deterministc Nominal Optimizer (DNO) pretty much handles the whole process and only required a few automatic iterations to reach closure.

Hidekazu then talked about finding the worst-case operating condition and corner. The WiCkeD tools can detect a worst operating condition between a min and max range. He also mentioned the easy to understand output graphs produced by the tools. The next part of his presentation was discussion of several case studies, including an AMP circuit, memory circuit, a comparator, and a logic circuit. For the AMP circuit, the optimization time went from 160h to ~6h. The area was also reduced by 60% compared to the original circuit with improved operating characteristics.

He closed with an overview of what he felt were the most useful features. Naturally the schematic porting features were included. He said it made it easy to replace devices with the new ones from the target PDK. It also automates any necessary rewiring. The Worst Case Analysis (WCA) algorithm significantly reduced the number of simulations needed for high sigma verification. This is useful for designs intended for automotive applications. WCA was also very useful for helping improve robustness for process variation and mismatch, with higher accuracy in fewer simulations.  Lastly, they were easily able to produce corner models based on PCM data from typical models. They came to within 1% of their target in only ~15 minutes.

Over time companies develop an array of design IP, which comes to represent significant value. Having the ability easily and predictably migrate this IP means that this value can be effectively leveraged for future projects. MunEDA tools make this a reality. The tutorial was filled with a rich variety of applications for MunEDA WiCkeD tools. If you were not able to attend the tutorial, the comprehensive slides are available are available on the MunEDA website. I expect that, just as I did, you will find the contents very informative.