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CEO Interview: Harald Neubauer of MunEDA

CEO Interview: Harald Neubauer of MunEDA
by Daniel Nenni on 07-09-2021 at 6:00 am

Harald Neubauer CEO of MunEDAIt has been my pleasure to interview Harald Neubauer, CEO of MunEDA. A veteran of the EDA industry, Harald cofounded MunEDA in 2001.

What brought you to the EDA industry?

Well, I always wanted to found a tech startup and was developing and evaluating various business ideas together with my later cofounder Andreas. Soon after we got introduced to Michael and Frank, who both worked on optimization techniques and statistical analysis at the Chair of Electronic Design Automation at TUM back in 2001, we started off in EDA as a spin off from the Technical University of Munich. Since then and until today all four of us have been serving as managing partner and building up MunEDA together.

Please tell us more about the origin of MunEDA

The origin of MunEDA has been based on excellent EDA research work done at the Technical University of Munich. The TUM Department of Electrical and Computer Engineering has been consistently ranked among the most successful departments worldwide. We have a continuous close cooperation with TUM and Prof. Ulf Schlichtmann, Prof. Kurt Antreich and Prof. Helmut Gräb from the Chair of Electronic Design Automation have been serving as member of MunEDA`s Advisory Board for many years until today.

So MunEDA stands for Munich EDA?

Oh yes, how could you tell? But certainly, MunEDA today also stands for EDA Tools for process migration, circuit sizing and optimization, as well as for high-sigma variation analysis and verification of Custom ICs.

Our key customers are Integrated Device Manufacturers, fabless IC design houses and silicon foundries. Our tool suite WiCkeD™ has been proven in industrial use for many years with semiconductor industry leaders globally and we do have numerous published success cases from our annual user group meetings from these companies.

What makes MunEDA unique?

Well, within our tool suite WiCkeD™, we offer the industry’s most advanced and powerful EDA tool suite for circuit sizing & optimization. Our solutions help circuit designers to improve the circuit design efficiency, decrease the risk of hidden failures and significantly increase the circuit quality. Designers often use WiCkeD™ especially for difficult sizing problems involving trade-offs between corners, parametric variation, yield, area, low power and low noise.

With our WiCkeD™ High Sigma and Variation tools we deliver best-in-class EDA tools for automated circuit analysis for high-sigma and ultra-high-sigma variation even beyond 6 sigma. Our solutions are unique in terms of speed, accuracy and scalability.

Our WiCkeD™ Schematic Porting Tool helps circuit designers to smoothly migrate analog IP from older process nodes to newer technologies or from one foundry technology to another foundry technology.

What are the top applications for the WiCkeD™ tool suite?

Gaining efficiency and quality with analog and mixed-signal design migration, optimization, and verification are the three main drivers for customers introducing our tools into their design flow. Analog and mixed-signal circuit optimization is applied with great success to interface circuits such as memory I/O in advanced node technologies, but also to power management ICs, amplifiers, comparators, RF power amplifiers, transceivers, filters, and other analog IP in larger more-than-Moore processes. Typical goals are minimizing power consumption and/or area footprint while meeting performance requirements for every process condition, temperature and supply voltage.

What does the next twelve months have in store for MunEDA?

MunEDA’s solutions enable customers to reduce the design time and effort of their circuits, increase robustness, and maximize circuit performance and yield. This is ever more important, especially in current times of chip shortage and also talent shortage in the semiconductor industry.

Moreover, we see more demand now for circuit migration to FinFET technologies. Going from bulk CMOS to FinFET with its discrete optimization variables and layout-dependent effects posed new challenges for optimization tools that we addressed.

We also increased the capacity of our analysis and verification tools. The statistical software is now able to efficiently perform statistical analysis of standard cells for LVF characterization, as well as high-sigma analysis of memory read paths with 100,000 devices and more.

So within the next 12 months, we are looking forward to see many further new customers looking for enhancing their capabilities with our leading-edge EDA tools to speed up their design work while achieving higher quality.

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