There have always been good reasons to port designs to new foundries or processes. These reasons have included reusing IP in new projects, moving an entire design to a smaller node to improve PPA, or second sourcing manufacturing. While there can be many potential business motivations for any of the above, in today’s environment with semiconductor supply shortages, design porting has taken on a new and compelling importance. With almost every fabless semiconductor company facing reductions in fab allocation, design teams are pressed to move existing designs to alternative fabs.
Second sourcing SOCs calls for porting both the digital and analog portions of the designs. In many SOCs it is enough to find equivalent analog IP, for such things as PLLs and IO’s, but mixed signal designs that feature custom IP blocks need more attention. While it is never truly easy to port digital designs, as a result of the use of RTL, libraries, synthesis and P&R this task is tractable. Analog is quite another thing altogether. Fortunately, MunEDA has a comprehensive solution for each stage of the analog design porting process. They offer their Schematic Porting Tool (WiCkeD SPT) and a suite of analog tools for tuning device parameters and design optimization.
InPLAY Inc. is a rapidly growing company focused on RF designs for low latency wireless (SMULL), Bluetooth, and Industrial IoT. Their products offer unique features and extremely high performance in terms of range, throughput and battery life. With demand growing rapidly, especially for their new active BLE beacon product, NanoBeacon, they have sought to diversify their manufacturing. I spoke recently with InPLAY’s CoFounder and Director of RF/AMS Design Russell Mohn about how they are managing the process.
Russell told me that once they realized they would need to move production to additional foundries, they chose MunEDA’s SPT – partly because they were already using MunEDA’s WiCkeD analysis and verification tools to optimize their analog designs. WiCkeD offers Circuit & Sensitivity Analysis, PVT & Corner Analysis, MonteCarlo Statistical Analysis, High Sigma & Worst Case Analysis, and a Robustness Verification Flow. Russell has been quite happy with the design results he has achieved with WiCkeD, and it was an easy choice to look at SPT to solve their new challenges.
SPT handles all the details of switching to the devices in the new process PDK. SPT helps the user set up the device, pin and parameter mapping information. Of course, some manual intervention is required, but the SPT user interface makes the task intuitive and straight forward. SPT will even help manage the changes in the drawn schematic symbols so the schematic remains legible.
In analog designs there is, of course, a lot more to moving to a new PDK than just mapping devices. Every aspect of the circuit behavior is prone to change. MunEDA’s DNO sizing and optimization tools, however, can automate most of the work using designer provided performance targets.
While I am sure that folks like Russell would rather be working 100% on developing new products, it come as a huge relief for him to have an effective option to keep up with the growing demand for their products in a time when the extra effort is required. It might be that SPT is a product whose time has come.
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