Siemens Calibre Seminarby Admin on 06-12-2025 at 12:54 pm
June 24, 2025
12:00 PM -1:00 PM
Moscone West | San Francisco, CA
Calibre: Supercharge your chip integration efforts
Siemens is excited to host an exclusive event for our customers at the Design Automation Conference
Join us at DAC for lunch and learn how our new products can supercharge your chip integration efforts:
– Chip… Read More
Defacto has been a leading provider of SoC integration tools for large-scale designs for years. Most major semiconductor companies already use their solutions, and several customers will be presenting how they leverage the Defacto solution (SoC Compiler) at the upcoming DAC conference.
This year, Defacto is announcing a major… Read More
DAC 2025by Admin on 05-12-2025 at 5:52 pm
About DAC
DAC is recognized as the global event for chips to systems. DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical… Read More
“Can AI Cut Costs in Electronic Design & Verification While Accelerating Time-To-Market?”
Industry leaders will discuss the transformative role of AI in semiconductor design and verification. As AI rapidly evolves, its potential to reduce costs, shorten time-to-market and address impending talent shortages is becoming… Read More
The rapid expansion of data-intensive applications, such as artificial intelligence (AI), high-performance computing (HPC), and 5G, necessitates connectivity solutions capable of handling massive amounts of data with high efficiency and reliability. The advent of 224G/112G Serializer/Deserializer (SerDes) technology,… Read More
Chris Morrison, Director of Product Marketing at Agile Analog met with me on the Tuesday at DAC this year, and I asked what has changed in the last year for their analog IP business. The short answer is that the company has initially built up foundation IP for Analog Mixed-Signal (AMS) uses, then recently added new IP for data conversion,… Read More
While the trend towards System-on-Chip (SoC) has been gathering momentum for quite some time, the primary driver has been integration of digital components, spurred by Moore’s law. Integrating more and more digital circuitry into a single chip has been consistently beneficial for performance, power, form factor and economic… Read More
There are many reasons today for dividing up large monolithic SoCs into chiplets that are connected together inside a single package. Let’s look at just some of these reasons. Many SoCs share a common processing core with application specific interfaces and specialized processing engines. Using chiplets would mean that it is… Read More
Every year at DAC, in addition to the hubbub of the exhibit floor and the relatively short technical sessions, there are a number of tutorials that dive in depth into interesting topics. At the 56th DAC in Las Vegas this year, MunEDA offered an interesting tutorial on Analog IP migration and optimization. This is a key issue for large… Read More
It was inevitable that EDA applications would meet the cloud. EDA has a long history of creating some of the most daunting compute challenges. This arises from employing current generation chips to design the next generation chips. Despite growing design complexity, many tools have kept pace and even reduced runtimes from generation… Read More
