There are many reasons today for dividing up large monolithic SoCs into chiplets that are connected together inside a single package. Let’s look at just some of these reasons. Many SoCs share a common processing core with application specific interfaces and specialized processing engines. Using chiplets would mean that it is… Read More
Tag: dac
Virtual DAC 2020 SAN FRANCISCO
DAC 2020: From EDA to Design on Cloud, Machine Learning, Embedded Systems and More
As the premier conference for the design automation of electronic systems, the 57th Design Automation Conference program has expanded to also include many verticals closely integrated with and/or dependent on cutting-edge electronic design… Read More
56th DAC – In Depth Look at Analog IP Migration from MunEDA
Every year at DAC, in addition to the hubbub of the exhibit floor and the relatively short technical sessions, there are a number of tutorials that dive in depth into interesting topics. At the 56th DAC in Las Vegas this year, MunEDA offered an interesting tutorial on Analog IP migration and optimization. This is a key issue for large… Read More
#56thDAC Discussion on Calibre in the Cloud Brings Sunshine to SOC Developers
It was inevitable that EDA applications would meet the cloud. EDA has a long history of creating some of the most daunting compute challenges. This arises from employing current generation chips to design the next generation chips. Despite growing design complexity, many tools have kept pace and even reduced runtimes from generation… Read More
DAC 2019 Will Be Even More IP Friendly!
DAC 2019 will take place in Las Vegas (June 2-6) this year before moving back to San Francisco in 2020 and for the next 5 years. Considering the various rumors about merging the conference, or even the end of DAC, this is a very good news! Not only for Design Automation, but, as we will see, for the IP industry.
In fact, if we look at the exhibitor… Read More
Mentor Calibre Panel
Getting your tape-out done on time is hard, but can it be made easier? That was the main topic of Mentor’s Calibre Panel held at DAC 2018, attended by a few key players in IC design ecosystem: Bob Stear, VP of Marketing at Samsung represented the foundry side; from the IP side, Prasad Subramaniam, VP of eSilicon for R&D and Technology;… Read More
DAC 2018 Potpourri
The venue
Despite of being held at the new three-story Moscone West building, this year 55th DAC in San Francisco bore many similarities as compared with last year’s. Similar booth decors and floorplan positioning of the big two, Synopsys and Cadence, which were across of each other and right next to the first floor entrance –although… Read More
Mentor & Phoenix Software Shed Light on Integrated Photonics Design Rule Checking
Just prior to the opening of the 54[SUP]th[/SUP] Design Automation Conference, Mentor, a Siemens company, and PhoeniX Software issued a press release announcing a new integration between their tools to help designers of photonic ICs (PICs) to close the loop for manufacturing sign-off verification. This is a significant piece… Read More
AI Being Used from Probing to Simulation
The 54th annual DAC event is fast approaching, so I hope to see many of you in Austin on June 18-21. The phrases Machine Learning and AI are growing in all areas of software, so I’m glad to see it appearing in more EDA tool offerings over the past year or so. One company that I plan to visit at DAC is Platform Design Automation because… Read More
Attending DAC in Austin for Free
I’ve been attending DAC since the late 1980’s and can tell you that it’s an annual highlight for me and anyone else interested in the EDA, IP and semiconductor industries. Where else can you see most of the big and little vendors of EDA software, semiconductor IP and foundries in one place? I recently blogged about… Read More