Go Native – With Methodics at DAC in Austin

Go Native – With Methodics at DAC in Austin
by Tom Simon on 06-01-2016 at 7:00 am

DAC is often a yearly reflection point for the companies that exhibit and attend. For the innovators it is an opportunity to look back and see a year of progress and development. Fortunately, this is the case for Methodics, which has had a strong year both in terms of business and technical development. Though, we easily see how these… Read More


DRC Concept for IP Qualification and SoC Integration

DRC Concept for IP Qualification and SoC Integration
by Pawan Fangaria on 05-30-2016 at 7:00 am

In the history of semiconductor design and manufacturing, the age-old concept of DRC rule-deck qualification for handshake between design and manufacturing still applies strongly to produce working silicon. In fact, DRC clean GDSII works as the de facto golden gate between a design and a foundry for manufacturing the chip for… Read More


How TSMC Tackles Variation at Advanced Nodes

How TSMC Tackles Variation at Advanced Nodes
by Pawan Fangaria on 05-27-2016 at 12:00 pm

The design community is always hungry for high-performance, low-power, and low-cost devices. There is emergence of FinFET and FDSOI technologies at ultra-low process nodes to provide high-performance and low-power requirements at lower die-size. However, these advanced process nodes are prone to new sources of variation.… Read More


DAC 2016 – Register Now

DAC 2016 – Register Now
by Bernard Murphy on 05-16-2016 at 7:00 am

DAC is again going to be in Austin (reason enough to go), from June 6[SUP]th[/SUP]-8[SUP]th[/SUP] for the main event. A number of events caught my eye:

  • Monday AM – custom hardware for algorithmic trading. If you want to know more about FinTech (technology for finance) this could be for you
  • Another Monday morning session on Linux
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A Versatile Design Platform with Multi-Language APIs

A Versatile Design Platform with Multi-Language APIs
by Pawan Fangaria on 04-19-2016 at 7:00 am

In one of my whitepapers “SoCs in New Context – Look beyond PPA”, I had mentioned about several considerations which have become very important in addition to power, performance, and area (PPA) of an SoC. This whitepaper was also posted in parts as blogs on Semiwiki (links are mentioned below). Two important… Read More


Replacing the British Museum Algorithm

Replacing the British Museum Algorithm
by Paul McLellan on 09-14-2015 at 7:00 am

In principle, one way to address variation is to do simulations at lots of PVT corners. In practice, most of this simulation is wasted since it adds no new information, and even so, important corners will get missed. This is what Sifuei Ku of Microsemi calls the British Museum Algorithm. You walk everywhere. And if you don’t walk to… Read More


Moving up Verification to Scenario Driven Methodology

Moving up Verification to Scenario Driven Methodology
by Pawan Fangaria on 09-11-2015 at 12:00 pm

Verification complexity and volume has always been on the rise, taking significant amount of time, human, and compute resources. There are multiple techniques such as simulation, emulation, FPGA prototyping, formal verification, post-silicon testing, and so on which gain prominence in different situations and at different… Read More


A Complete Simulation Platform for Mobile Systems

A Complete Simulation Platform for Mobile Systems
by Pawan Fangaria on 08-23-2015 at 7:00 am

If we take an insight into the semiconductor industry, we can easily find that mobile systems are the main drivers of this industry. The Smartphone business has remained at the top since a good number of years. Although the Smartphone sales growth has started showing a sign of stagnation, it is still a main contributor with a solid… Read More


My Tryst with Semiconductors and EDA

My Tryst with Semiconductors and EDA
by Pawan Fangaria on 08-19-2015 at 4:00 pm

Yes, today I realize it feels like a tryst with semiconductors. In actual meaning; it wasn’t a love affair with semiconductors, but I must say the greatest thing it taught me about how it approaches towards perfection. And that became the guiding principle in my life; how can I do something better. Of course nothing is perfect in life… Read More


How PowerArtist Interfaces with Emulators

How PowerArtist Interfaces with Emulators
by Pawan Fangaria on 07-16-2015 at 5:00 pm

Last month in DAC I could see some of the top innovations in the EDA world. EDA is a key enabler for advances in semiconductor designs. Among a number of innovations worth mentioning (about which I blogged just after DAC), the integration of Mentor’s Veloce with ANSYS’ PowerArtist for power analysis of live applications caught my… Read More