Magwel CEO Dündar Dumlugöl is well known from his days at Cadence, where I first met him, and for his more recent tenure at Magwel. At Cadence he led the team that first developed Spectre. He has come a long way from the start of his career at IMEC in Belgium. He and I had a chance to have a conversation recently where he offered insights into ESD, latch-up and power transistor modeling – all areas where Magwel offers increasingly popular solutions.
Why is modeling power transistors so important these days?
Well, as you know, we are seeing an explosion in the number of mobile and wireless products coming to market. These are all battery powered, so buck and boost converters are essential for converting battery voltages to the circuit operating voltages. A significant determinant of battery life is the efficiency of these converters. An inefficient converter will waste energy. Also, power hungry converters need more expensive packages and larger heat sinks. Often the root causes of this wasted power include on-state resistance, low switching efficiency and the thermal characteristics of the power transistors used in these converters. Quite simply, if the power transistors are not optimized correctly battery run time will suffer.
Tell us more about electro-thermal modeling and what problems it solves?
The operating characteristics of a power transistor are affected by temperature. However, the temperature is determined by joule heating, the package, plus heat sources and sinks on the board. You just can’t look at one without the other. So traditional SPICE methods involve guesswork, which can lead to significant errors during the design process.
The best way to solve this problem is to run actual stimulus through the device to look at all the thermal behavior over time and converge on a unified electro-thermal result for the device operation. This is what our PTM-ET product does. It uses 3D thermal and electrical modeling performed concurrently to give a highly accurate result.
What are the barriers to modeling power device switching in converter circuits using conventional SPICE models?
SPICE is good at modeling individual device junctions. However, power transistors are composed of thousands of parallel devices with complex metal interconnect structures. A single SPICE model does not reflect the large complex distributed nature of a power transistor in transient operation. In addition, high currents on the internal interconnect of the device require 3D current flow modeling to capture parasitic losses and excessive current densities needed for performance and reliability assessment.
Device switching is not instantaneous, but rather there is skew and slew in the gate signal and as it travels toward each individual active device. At Magwel we have found that co-simulation with Spectre allows circuit level simulation to include the non-uniform switching effects that can be detrimental to operation. Non-uniform switching can lead to higher switching power dissipation and reliability issues due to current crowding.
With several ESD tools already on the market, why did Magwel develop its own solution – ESDi?
Our existing customers, who were very happy with our power transistor tools, started telling us that they saw areas for improvements in their existing ESD tools. We were hearing that accuracy and usability were both significant problems with the tools they already owned. They approached us to see if we would collaborate with them to develop a better solution.
We have excellent 3D extraction technology as part of our core capabilities. We also have deep experience with simulation that enabled us to create an efficient engine for modeling snap-back devices. We took these and added highly intuitive usability, visualization and reporting. The response was very good. Recently we have moved ahead even further by making the setup easy with automated ESD device tagging and a wide range of parasitic device recognition. We also boosted performance with parallel processing. We are seeing results that match silicon very closely and do not suffer from excessive false error reporting. This is due to our unique algorithms that model all the parallel discharge paths. This distributes the discharge current properly across all the affected devices.
Do you see your customers looking for solutions to help diagnose latch-up?
We have worked with several customers to understand their silicon failures that were proving difficult to track down. During the process latch-up had been proposed as the failure mechanism. This is how we became involved. Our device modeling and solver technology made an excellent platform to create a tool that models minority carrier injection into the substrate. Using this we can evaluate substrate currents and look for correlation. We have developed methods to use this information to reduce the effects and improve silicon results.
This is an excellent example of the ways we can take our very mature technology and apply it to the difficult real world problems that our customers face.
What other interests do you have outside of the semiconductor field?
I really like to run every day. I live in an area where there are good running trails nearby and make it part of my daily routine. I also read a wide variety of books, including history, economics and politics. Of course, I read up on engineering and related topics frequently as well.
For more detailed information about Magwel and the products they provide, take a look at their website.
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