WP_Term Object
    [term_id] => 8
    [name] => ClioSoft
    [slug] => cliosoft
    [term_group] => 0
    [term_taxonomy_id] => 8
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 97
    [filter] => raw
    [cat_ID] => 8
    [category_count] => 97
    [category_description] => 
    [cat_name] => ClioSoft
    [category_nicename] => cliosoft
    [category_parent] => 157
    [is_post] => 1

The Changing Face of IP Management

The Changing Face of IP Management
by Alex Tan on 11-05-2018 at 11:00 am

Aristotle once said “The whole is greater than the sum of its parts”. The notion of synergism echoes the importance of leveraging design IPs to the maximum extent with the rest of the system under development, in order to ensure a successful SoC design outcome in a shorter development cycle.

SoC design cost and entry point22575-caption.jpg
For over a decade design IPs have increased in complexity and have steadily grown to become the starting point of most SoC designs today. Foundries such as TSMC have disclosed data regularly showing a steady increase on silicon proven IP offerings to keep pace with frequent shift in process technologies and design applications. As shown in figure 1, the number of itemized IPs has doubled to more than 16,000 over the years, accompanied by numerous process technology collaterals (200+ PDK; 9000+ technology files).

On the other hand, many fabless companies including top-performer startups attempt to establish value differentiation in their products through innovations leading to internal IP development efforts that eventually translate to candidates for patented technologies. Other design teams may bridge the gap between shorter design cycles and having marketable products by reducing the overall design risk and cost through a mix of externally proven interface IP blocks (such as Ser-Des, PCI-e, etc.) and internally developed IPs containing their core technology.

Based on a recent Semico research data, SoC design cost –including IP integration cost—is surging, and prompting designers to exercise prudence in their design selection such as in choosing the right IPs, target technology nodes, the correct version of the PDK and the type of design implementation (FPGA vs ASIC).

IP stakeholders, design IP management and designHub22575-caption.jpg
Designers are often wearing dual hats: one as IP developers while designing new blocks, and the other as IP users or integrators. An ideal IP management solution should be capable of serving this dual usage types and bridge the gap between the IP developers and IP users within a company. Most IP users prefer to be able to trace the IP to see its usage, process nodes available, have access to IP developers to have any queries answered, compare IPs and have access to open issues, as well as the available documentation for the IP.

22575-caption.jpgYet the IP developers –-who will build, check and populate the design building blocks — are often concerned about the support they have to provide for the IP. Managing and answering the constant queries on the IPs after all takes time. Other challenges for the IP developer is in keeping the IP secure, keeping track of the different versions of the IP and the data associated with each revision, the process nodes and the PDKs used. Moreover, with the IP information fragmented across multiple applications such as issue tracker, meeting minutes, documents, emails etc, it becomes challenging to collate all the information in one location for easy access for the IP user.

Given the rise of IPs and the IP subsystems being used, it becomes more important to have a flexible IP ecosystem that could facilitate the growing needs and use models of semiconductor design companies –in building system level designs as well as frequent auditing and update needs due to product refresh.

More importantly, every company has a large number of internal IPs which could be leveraged to build new SoCs. Unfortunately the lack of confidence in the internally used IPs compells design teams within a company to look at alternatives which can include either developing their own IP or buying another IP. Such a choice tends to affect the bottom line of the company.

The correct solution would be to facilitate the bridging of the gap between the IP developer and user by providing an ecosystem wherein the IP user can qualify the IP easily and browse through the available documentation collated from different applications such as document control systems, emails, issue tracking systems, etc. Moreover to reduce the support burden for the IP developer, it becomes necessary to have a knowledgebase around every IP which can be used by the users to have their queries answered.


designHUB is ClioSoft’s answer to the problems faced by design teams today. It is an enterprise IP management solution which addresses the needs of IP developers and users alike. As an IP ecosystem, designHUB bridges the gap between IP user and IP developer for internal IPs by enabling users to leverage a growing knowledge base of the IPs to resolve any issue they may have. It is easily configurable to meet the IP reuse requirements of most design companies and manages a complex matrix of IP attributes such as process nodes, nodlets, foundries, IP functionality, IP usage, etc. without intimidating the user. As a result, any user can provide a wide array of attributes to find and compare an IP. designHUB is also capable of tracking the variations of an IP through its various stages of evolution and has built-in analytics to report IP usage and its various nuances.

IP reuse, security and ecosystem
Design reuse provides an opportunity for design teams to plan ahead and target parts of their incepted designs to be used in future product developments. Having access to all the information regarding an IP enables designers to make more qualified decisions on which IPs to use for their SoC. But it becomes necessary to choose a platform which can match the growing needs of your enterprise as well as the new evolving technologies.

22575-caption.jpgdesignHUB IP management promotes design reuse within a company by providing an easy-to-use dashboard to manage the process of creating and publishing IPs as well as their derivatives. Most importantly, it is DM agnostic. Most companies have either no DM, one DM or many DMs (such as SOS7, Perforce, Git, Subversion). It becomes important to have a IP management system which works with all types of DM or no DM –as no company wants to reinvent the wheel for internally developed IPs. If there is any IP, which that can be reused within the company, the idea is to leverage it to the maximum extent possible. As a flexible IP reuse ecosystem, designHUB can help designers to map reuse requirements and select the most suitable IPs for their SoCs.

To recap, selecting the right entry point (technology, IPs) and a robust IP management solution is key in reducing potential risks of over-budgeting and failure in SoC design. For more details on ClioSoft’s designHUB check HERE.