Mission-critical IC design for segments like automotive, aerospace, defense, medical and 5G have more stringent reliability analysis requirements than consumer electronics, and entails running special simulations for the following concerns:
- Electromigration analysis
- IR drop analysis
- MOS aging
- High-sigma Monte Carlo analysis
- Analog fault simulation
Synopsys offers PrimeSim Reliability Analysis to address these important issues.
Anand Thiruvengadam, from Synopsys spoke with me by Zoom last week to provide an update on their unified workflow of reliability analysis tools, which are used to shorten the time for reliability analysis. The IC design trends are pretty clear:
- Complexity is increasing
- Circuit size is growing
- Frequencies creep upwards
- Noise margins are becoming lower
- Parasitic effects are becoming dominant
- Higher ERC coverage is essential
- Low DPPM required for safety
- Power and Ground integrity are vital
- Electro-therm reliability analysis needed
This means that IC designers need faster and higher capacity simulators to perform analysis, and that to ensure a long IC operating lifetime and comply with standards like ISO 26262, more reliability analysis is required.
Synopsys Reliability Analysis Tools
The PrimeSim Continuum tool announced earlier in the year was first blogged by Tom Simon in May, and there are four SPICE engines to choose from:
- PrimeSim SPICE- fast and accurate for custom digital and analog/RF
- PrimeSim HSPICE – sign-off reference for foundation IP, SI/PI
- PrimeSim Pro – speed and capacity for DRAM and Flash
- PrimeSim XA – FastSPICE for mixed-signal SoC and SRAM
PrimeSim Reliability Analysis is a unified workflow of proven and foundry-certified reliability analysis tools to meet the reliability challenges. To find and fix IC reliability issues early in the design process an engineer runs static analog and digital Electrical Rule Checks (ERC) using PrimeSim CCK. To design with lower margins and ensure robustness at the extremes of operating conditions , you run the Advanced Variability Analysis (AVA) tool, using ML applied to high-sigma Monte Carlo. Power and ground integrity can be statically analyzed with PrimeSim SPRES. Electromigration and IR drop analysis are verified with PrimeSim EMIR. Aging effects are simulated with PrimeSim MOSRA. Manufacturing test coverage and functional safety are verified with analog fault simulations using PrimeSim Custom Fault.
In the automotive market they are required to use FMEDA techniques; Failure Modes, Effect and Diagnostic Analysis. PrimeSim Custom Fault enables FMEDA, and users can even extend this by adding their own analog faults.
In the old days variability analysis was addressed with brute-force Monte Carlo analysis, but today we don’t have enough time to run a billion simulations, so by applying ML to Monte Carlo analysis we find a smarter way to get the same high-sigma coverage desired as brute force with orders of magnitude fewer Monte Carlo simulations.
Transistors change their Vt and Ids curves as a function of time, voltage and temperature, so using a tool like PrimeSim MOSRA you can now predict these effects and simulate them before tape out to mitigate the effects of aging and ensure long operating lifetimes as required by applications such as automotive.
To setup and then visualize many of these simulations there’s a tool called PrimeWave, and it provides a cohesive reliability environment with features like weakness analysis.
Tier-one semiconductor companies have already been using PrimeSim Reliability Analysis:
- Dialog Semi – PrimeSim CCK for analog IPs
- TDK-Micronas – Custom Fault for IP-level FMEDA analysis and ISO 26262 compliance
- ST – EMIR analysis for analog IPs, also MOSRA, and AVA
- AMD – PrimeSim HSPICE with AVA for high-sigma analysis
Synopsys has been in the SPICE business for decades, and with PrimeSim Continuum and PrimeSim Reliability Analysis they have productized what mission-critical IC designers clamor for, a way to find and mitigate reliability concerns. Another strength that Synopsys has is their own IP development group, so they can use PrimeSim Reliability Analysis to produce their IP cells faster and with higher confidence across more foundry nodes.
- Using Machine Learning to Improve EDA Tool Flow Results
- Die-to-Die Connections Crucial for SOCs built with Chiplets
- Synopsys Debuts Major New Analog Simulation Capabilities
- Global Variation and Its Impact on Time-to-Market for Designs
- Prevent and Eliminate IR Drop and Power Integrity Issues Using RedHawk Analysis Fusion