In business we all have heard the maxim, “Time is Money.” I learned this lesson early on in my semiconductor career when doing DRAM design, discovering that the packaging costs and time on the tester were actually higher than the fabrication costs. System companies like IBM were early adopters of Design For Test (DFT)… Read More
Author: Daniel Payne
Addressing SoC Test Implementation Time and Costs
Single HW/SW Bill of Material (BoM) Benefits System Development
Most large electronics companies take a divide and conquer approach to projects, with clear division lines set between HW and SW engineers, so quite often the separate teams have distinct methodologies and ways to design, document, communicate and save a BoM. This division can lead to errors in the system development process,… Read More
A Brief History of Perforce
In 2020 Perforce acquired Methodics, a provider of IP Lifecycle Management (IPLM) tools, and Daniel Nenni blogged about that in July 2020, but a lot has happened since Perforce was founded in 1995. In the beginning Christopher Seiwald founded Perforce in his Alameda basement based on his background as a software developer, and… Read More
CES 2021 and all things Cycling Technology
It’s January so time to give you another summary of what I’ve found at CES 2021 about new cycling products that have electronic content. During the pandemic in 2020 we’ve seen a surge in sales for bicycles, e-bikes, spin bikes and trainers as people wanted a simple way of getting around town running errands, or… Read More
Conference: Embedded DevOps
The catchy phrase DevOps is defined by Agile advocates as, “The practice of operations and development engineers participating together in the entire service lifecycle, from design through the development process to production support.”
I’ve been developing software since the stone ages, which means… Read More
Analysis of Curvilinear FPDs
This area of automating the design of Flat Panel Displays (FPD) is so broad that it has taken me three blogs to cover all of the details, so in brief review the first two blogs were:
My final blog covers five areas:
- DRC/LVS for curvilinear layout
- Circuit
Curvilinear FPD Layout and Schematics
You are likely reading this blog using a Flat Panel Display (FPD), because they are so ubiquitous in our desktop, tablet and smart phone devices. Today I’m following up from a previous article. A quick recap of the unique design flow for FPD is shown below:
What follows is the second part of a Q&A discussion with Chen Zhao… Read More
Third Generation of IP Lifecycle Management Launched
Back in July I first read the news that Perforce had acquired Methodics, and wasn’t too surprised, because many of the EDA vendors that we blog about do get acquired or merge with similar sized companies in order to be part of a bigger offering. When Methodics announced a webinar introducing IPLM 3.0 (IP Lifecycle Management),… Read More
Automating the Design of Flat Panel Displays
I’ve used OLED (Organic Light-Emitting Diode) displays for many years in my monitors, laptops, tablets, e-readers and smart phones; and knew that the AMOLED (Active-Matrix OLED) displays used thin-film transistor technology where each pixel can be controlled, but I hadn’t considered the actual design process… Read More
Automotive Upate at Arm DevSummit from VW
Although our family has down-sized to just one vehicle, my dream car is still a Tesla, both because it’s an EV and they have a vision for autonomous vehicles. At the recent Arm DevSummit I watched a fireside chat with Alexander Hitzinger, CEO of Artemis, the skunkworks at Audi, part of the Volkswagen Group. I knew that Audi … Read More
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Die-to-Die Interface PHY and Controller Subsystem for Next Generation Chiplets