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Succeeding with 56G SerDes, HBM2, 2.5D and FinFET

Succeeding with 56G SerDes, HBM2, 2.5D and FinFET
by Daniel Nenni on 03-17-2017 at 4:00 pm

eSilicon presented their advanced ASIC design capabilities at a seminar last Wednesday evening. This event was closed to the press, bloggers and analysts, but I managed to get some details from a friend who attended. The event title was: “Advanced ASICs for the Cloud-Computing Era: Succeeding with 56G SerDes, HBM2, 2.5D and FinFET”. Lots of advanced technology loaded into that title. Here is the summary of the event:

A dramatic increase in network bandwidth and cloud-computing infrastructure is on the way. Fueled by applications such as deep machine learning and massive data volumes from a connected world, the performance demands of ASICs to support these new applications are daunting.

Join eSilicon, Rambus and Samsung Foundry for an overview of the advanced technologies being deployed to address these challenges. We’ll discuss HBM technology and the associated PHY, high-speed SerDes technology, 2.5D integration, high-performance ASIC design, interposer/package design and the manufacturing and packaging technologies available to address this class of FinFET-based designs.

It seems that the main message was that it takes teamwork throughout the ecosystem to build advanced ASICs. eSilicon presented an overview of their FinFET ASIC, interposer and package design skills along with a discussion of some of their enabling IP. I was able to get a few of their slides. A lot of these advanced designs use 2.5D integration for HBM memory stacks.

Slide 1 is an overview of what’s needed for a successful HBM-based design. Some of the points here are familiar – reduced design time and the need for silicon-proven IP, along with comprehensive silicon characterization. There are some new items as well. Interposer design with electrical, thermal and mechanical analysis. Thermal and mechanical analysis for a substrate is new and seems to be an important element of success for these kind of designs. Low cost is nothing new, but the need to manage inventory (i.e., memory) and the associated assembly of the complete bill of materials is new.

I found slide 2 quite interesting. It seems that eSilicon has been running test vehicles on 2.5D integration for about six years. That’s a lot of experiments. This slide summarizes a few of those experiments. The series of tests shown progress from simple tests on the substrate and package, to thermal analysis and then full system operation. Becoming proficient in these kinds of designs is definitely not a casual exercise.

Slide 3 is the obligatory marketing slide. It summarizes what eSilicon offers for interposer and package design and gives a nod to their willingness to be the “one chokeable neck” for product delivery. These designs look very challenging. If you’re thinking of diving into that end of the pool, I would give eSilicon a call, absolutely.

About eSilicon
eSilicon provides products and services to the global semiconductor industry. Our services include ASIC design services and the coordination of the global, outsourced manufacturing supply chain that implements those custom integrated circuits. We call this model semiconductor manufacturing services. We deliver the manufactured custom ICs in volume to our customers at a pre-negotiated price.

We also develop memory IP and I/O products, both off the shelf and custom. Our memories are optimized across the spectrum of performance, power, area, and yield to address your specific market requirements.

Our customers are semiconductor companies, integrated device manufacturers, original equipment manufacturers and wafer foundries that sell their products into a variety of end markets, including communications, computing, consumer, industrial and medical products.