Data Centers are rapidly evolving in response to significant tidal forces: the exponential growth in data traffic, the rise of new workloads with AI/ML being one of the foremost, and the distribution of computing to the edge of the network for low latency, real-time applications.… Read More
Tag: rambus
Rambus Design Summit
October 8, 2020
Join us for a day of virtual sessions covering the selection and implementation of IP solutions for the data center, 5G/edge and IoT devices including advancing the performance of AI/ML applications.
Connect with a community of industry experts and gain insights and practical information for the implementation… Read More
AI Requires Tailored DRAM Solutions
Rambus Take on AI in the Era of Connectivity at Linley Processor Conference
Steven Woo, Fellow and Distinguished Inventor presented at the just concluded Linley Spring Processor Conference a talk about AI in the Era of Connectivity. As he put it, the world is becoming increasingly connected, with a marked surge of digital data, causing a dependence on said data. With the explosion of digital data and AI,… Read More
Spring Forward with AI
The euphoria of NCAA March Madness seems to spill over into the tech world. The epicenter of many tech talks this month spanning from GPU conference, OCP, SNUG to CASPA has evolved around an increased AI endorsement by many companies and its integration into many silicon driven applications. At this year CASPA Spring Symposium,… Read More
SOC security is not a job for general purpose CPUs
Life is full of convenience-security tradeoffs. Sometimes these are explicit, where you get to make an active choice about how secure or insecure you want things to be. Other times we are unaware of the choices we are making, and how risky they are for the convenience provided. If you leave your bike unlocked, you can expect it to be… Read More
Does the G in GDDR6 stand for Goldilocks?
In the wake of TSMC’s recent Open Innovation Platform event, I spoke to Frank Ferro, Senior Director of Product Management at Rambus. His presentation on advanced memory interfaces for high-performance systems helped to shed some light on the evolution of system memory for leading edge applications. System implementers now… Read More
Who is Responsible for SIP Revenue Decline in Q2 2018?
According with ESDA, EDA revenues have grown YoY by 16.2% in Q2 2018, and this is the good news for our industry. The bad news is the decline of SIP (Design IP) revenues, by (3.1%) at the same time. As far as I am concerned, this figure looks weird, so I will try to understand the reason why SIP category can go wrong in a healthy EDA market,… Read More
High Performance Ecosystem for 14nm-FinFET ASICs with 2.5D Integrated HBM2 Memory
High Bandwidth Memory (HBM) systems have been successfully used for some time now in the network switching and high-performance computing (HPC) spaces. Now, adding fuel to the HBM fire, there is another market that shares similar system requirements as HPC and that is Artificial Intelligence (AI), especially AI systems doing… Read More
FinFET ASICs for Networking, Data Center, AI and 5G
On the heels of successful seminars in Tokyo and Shanghai, eSilicon is starting the new year back in the cloud with a webinar version of the live events for those, like myself, who could not attend. The webinar will compress the 3 hour live event into 60 minutes which will provide a great place to start a conversation on your next chip… Read More
Intel TSMC Update!