Webinar: Advanced CMOS/FinFET Fabrication

Webinar: Advanced CMOS/FinFET Fabrication
by Admin on 07-23-2024 at 6:56 pm

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something… Read More


The TSMC OIP Backstory

The TSMC OIP Backstory
by Daniel Nenni on 09-18-2023 at 6:00 am

TSMC OIP 2023

This is the 15th anniversary of the TSMC Open Innovation Platform (OIP). The OIP Ecosystem Forum will kick off on September 27th in Santa Clara, California and continue around the world for the next two months in person and on-line in North America, Europe, China, Japan, Taiwan, and Israel. These are THE most attended semiconductor… Read More


WEBINAR: FinFET UltraPcell Methodology

WEBINAR: FinFET UltraPcell Methodology
by Daniel Nenni on 05-25-2023 at 6:00 am

ICMask PG Pcells JUNE Webinar

The custom physical implementation of circuit designs is a critical component of the integrated circuit (IC) process. Unfortunately, this step has been known to be one of the most time-consuming and prone to human error. Therefore, the need for a methodology that allows for faster, more accurate, and less error-prone work is … Read More


Gate Resistance in IC design flow

Gate Resistance in IC design flow
by Maxim Ershov on 05-03-2023 at 6:00 am

Figure1 9

MOSFET gate resistance is a very important parameter, determining many characteristics of MOSFETs and CMOS circuits, such as:

• Switching speed
• RC delay
• Fmax – maximum frequency of oscillations
• Gate (thermal) noise
• Series resistance and quality factor in MOS capacitors and varactors
• Switching speed and uniformity… Read More


IEDM 2022 – TSMC 3nm

IEDM 2022 – TSMC 3nm
by Scotten Jones on 01-02-2023 at 6:00 am

TSMC CPP

TSMC presented two papers on 3nm at the 2022 IEDM; “Critical Process features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond” and “A 3nm CMOS FinFlexTM Platform Technology with Enhanced Power Efficiency and Performance for Mobile SOC and High Performance Computing Applications”.

When … Read More


Achieving 400W Thermal Envelope for AI Datacenter SoCs

Achieving 400W Thermal Envelope for AI Datacenter SoCs
by Kalar Rajendiran on 12-05-2022 at 10:00 am

Alchip BlockDiagram Oct 26 2022 tsmc na oip presentation

Successful ASIC providers offer top-notch infrastructure and methodologies that can accommodate varied demands from a multitude of customers. Such ASIC providers also need access to best-in-class IP portfolio, advanced packaging and test capabilities, and heterogeneous chiplet integration capability among other things.… Read More


3D Device Technology Development

3D Device Technology Development
by Tom Dillinger on 07-13-2022 at 6:00 am

CFET cross section v2

The VLSI Symposium on Technology and Circuits provides a deep dive on recent technical advances, as well as a view into the research efforts that will be transitioning to production in the near future.  In a short course presentation at the Symposium, Marko Radosavljevic, from the Components Research group at Intel, provided … Read More


Three Key Takeaways from the 2022 TSMC Technical Symposium!

Three Key Takeaways from the 2022 TSMC Technical Symposium!
by Daniel Nenni on 06-16-2022 at 12:10 pm

TSMC Technology Roadmap 2022

The TSMC Technical Symposium is today so I wanted to give you a brief summary of what was presented. Tom Dillinger will do a more technical review as he has done in the past. I don’t want to steal his thunder but here is what I think are the key takeaways. First a brief history lesson.

The history of TSMC Technology Development with 12 keyRead More


Designing a FinFET Test Chip for Radiation Threats

Designing a FinFET Test Chip for Radiation Threats
by Tom Simon on 04-04-2022 at 10:00 am

Charged Particles

Much of the technology that goes into aerospace applications is some of the most advanced technology that exists. However, these same systems must also offer the highest level of reliability in what is arguably an extremely difficult environment. For semiconductors a major environmental risk in aerospace applications are … Read More