Advanced CMOS/FinFET Fabrication

Advanced CMOS/FinFET Fabrication
by Semitracks Inc. on 04-30-2020 at 9:00 am

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something known… Read More


Advanced CMOS/FinFET Fabrication

Advanced CMOS/FinFET Fabrication
by Semitracks Inc. on 03-04-2020 at 9:00 am

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something known… Read More


ADVANCED CMOS TECHNOLOGY 2020 (THE 10/7/5 NM NODES)

ADVANCED CMOS TECHNOLOGY 2020 (THE 10/7/5 NM NODES)
by Daniel Nenni on 02-05-2020 at 12:00 am

acmos62a

Course Description:

The relentless drive in the semiconductor industry for smaller, faster and cheaper integrated circuits has driven the industry to the 10 nm node and ushered in a new era of high-performance three-dimensional transistor structures. The speed, computational power, and enhanced functionality of ICs based… Read More


Advanced CMOS Technology 2020 (The 10/7/5 NM Nodes)

Advanced CMOS Technology 2020 (The 10/7/5 NM Nodes)
by Daniel Nenni on 01-28-2020 at 10:00 am

Our friends at Threshold Systems have a new class that may be of interest to you. It’s an updated version of the Advanced CMOS Technology class held last May. As part of the previous class we did a five part series on The Evolution of the Extension Implant which you can see on the Threshold Systems SemiWiki landing page HERE. And… Read More


IEDM 2019 – IBM and Leti

IEDM 2019 – IBM and Leti
by Scotten Jones on 01-08-2020 at 6:00 am

Slide3

IBM and Leti each presented several papers at IEDM including a joint nanosheet paper. I had the opportunity to sit down with Huiming Bu, director of advanced logic & memory tech and Veeraraghavan Basker, senior engineer from IBM and then in a separate interview Francois Andrieu, head of advanced CMOS laboratory and Shay Reboh,… Read More


IEDM 2019 – Applied Materials panel EUV Recap

IEDM 2019 – Applied Materials panel EUV Recap
by Scotten Jones on 12-23-2019 at 10:00 am

On Tuesday night of IEDM, Applied Materials held a panel discussion “The Future of Logic: EUV is Here, Now What?”. The panelists were: Regina Freed, managing director at Applied Materials as the moderator, Geoffrey Yeap, senior director of advanced technology at TSMC, Bala Haran, director of silicon process research at IBM, … Read More


My Top Three Reasons to Attend IEDM 2019

My Top Three Reasons to Attend IEDM 2019
by Scotten Jones on 10-11-2019 at 6:10 am

The International Electron Devices Meeting is a premier event to learn about the latest in semiconductor process technology. Held every year in early December is San Francisco this years conference will be held  from Decembers 7th through December 11th. You can learn more about the conference at their web site here.

This is a must… Read More


TSMC OIP Overview and Agenda!

TSMC OIP Overview and Agenda!
by Daniel Nenni on 09-05-2019 at 6:00 am

The TSMC Symposium and OIP Ecosystem Fourm are the most coveted events of the year for the fabless semiconductor ecosystem, absolutely. In my 35 years of semiconductor experience never has there been a more exciting time in the ecosystem and that is clear by the overview and agenda for this year’s event. I hope to see you there:… Read More


WEBINAR: VLSI Design Methodology Development

WEBINAR: VLSI Design Methodology Development
by Daniel Nenni on 09-04-2019 at 10:00 am

This webinar provides a brief overview of a new text, VLSI Design Methodology Development. The content of the book will be reviewed, highlighting topics that have recently influenced SoC design methodology features – e.g., FinFET circuit libraries, multipatterning lithography, layout-dependent effects, electromigration… Read More


Webinar: VLSI Design Methodology Development (new text)

Webinar: VLSI Design Methodology Development (new text)
by Tom Dillinger on 08-28-2019 at 10:00 am

Daniel Nenni was gracious enough to encourage me to conduct a brief webinar describing a new reference text, recently published by Prentice-Hall, part of the Semiwiki Webinar Series.

VLSI DESIGN Methodology Development Webiner Replay

Background

I was motivated to write the text to provide college students with a broad background… Read More