WP_Term Object
(
    [term_id] => 76
    [name] => Tanner EDA
    [slug] => tanner-eda
    [term_group] => 0
    [term_taxonomy_id] => 76
    [taxonomy] => category
    [description] => 
    [parent] => 14433
    [count] => 60
    [filter] => raw
    [cat_ID] => 76
    [category_count] => 60
    [category_description] => 
    [cat_name] => Tanner EDA
    [category_nicename] => tanner-eda
    [category_parent] => 14433
)

Improving Design Practices for an Image Sensor IDM

Improving Design Practices for an Image Sensor IDM
by klujan on 05-07-2013 at 8:30 pm

 With nearly twenty five years in business, Tanner EDA Application Engineers have seen a wide range of support requests. One consistent topic area is around design data management and design reuse. In one recent instance, our customer, an IDM who produces imaging sensors for infrared vision systems, called on Tanners AE team for onsite consulting to help drive design consistency and to create libraries of common cells that could be shared. Tanner’s AEs had previously delivered tool training for several of their design groups, but business growth led the customer to add several new designers who were less experienced with these practices.

Working onsite with the designers, I learned about the common structures they needed to create as well as the inconsistencies they experienced in the manufacturing and snap grid settings – this led to us implementing a server-based Technology Library for setup and common cell structures. Because image sensor design is fraught with redesign and resizing of common cells, we also implemented a set of T-Cell templates that designers could use to create structures quickly and efficiently. (In addition to the first-order impact on design time, this approach also greatly improved quality and reduced rework). The template T-Cells were added to the server-based Technology Library; allowing shared access for all designers. With Tanner’s v16 of L-Edit, the designers make use of the multi-user Open Access environment, allowing multiple designers to work on their respective cells within a common design. The productivity gains from this consulting engagement have already delivered tangible ROI to the customer, and they have scheduled follow-on consulting to address challenges in other parts of their workflow.

Tanner EDA will exhibit at DAC 2013, June 2-4[SUP]th[/SUP], in booth 2442 and in the ARM Connected Community® (CC) Pavilion, #921. The entire analog and mixed-signal design suite will be demonstrated:

  • Front-end design tools for schematic capture, analog SPICE and FastSPICE simulation, digital simulation, transient noise analysis, waveform analysis,
  • Back-end tools, including analog layout, SDL, routing and layout accelerators as well as static timing and synthesis, and
  • Physical verification, including DRC and LVS.

Visit www.tannereda.comto learn more. DAC demo sign-ups are HERE.

Tanner EDA provides a complete line ofsoftware solutionsthat drive innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS.Customersare creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

lang: en_US

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.