Arm and Cadence: Achieving Best Silicon Power, Performance, and Area

Arm and Cadence: Achieving Best Silicon Power, Performance, and Area
by Admin on 05-11-2022 at 12:00 am

Join Cadence and Arm to learn how you can achieve the best power, performance, area (PPA) and time to tapeout for Arm® CPU implementation using the latest Cadence® Digital Full Flow. This event covers topics including high-performance design for the Arm Cortex®-A710 and other Arm processors, energy-efficient CPU implementation

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Design IP Sales Grew 19.4% in 2021, confirm 2016-2021 CAGR of 9.8%

Design IP Sales Grew 19.4% in 2021, confirm 2016-2021 CAGR of 9.8%
by Eric Esteve on 05-05-2022 at 6:00 am

Table IP 2020 2021 1

Design IP Sales reached $5.45B in 2021, or 19.4% YoY after 16% in 2020, on-sync with semiconductor growth of 26.2% in 2021 according to WSTS. IPnest has released the “Design IP Report” in May 2022, ranking IP vendors by category (CPU, DSP, GPU & ISP, Wired Interface, SRAM Memory Compiler, Flash Memory Compiler, Library and I/O,… Read More


Synopsys Tutorial on Dependable System Design

Synopsys Tutorial on Dependable System Design
by Bernard Murphy on 04-06-2022 at 6:00 am

Dependability

Synopsys hosted a tutorial on the last day of DVCon USA 2022 on design/system dependability. Which here they interpret as security, functional safety, and reliability analysis. The tutorial included talks from DARPA, AMD, Arm Research and Synopsys. DARPA and AMD talked about general directions and needs, Arm talked about their… Read More


WEBINAR: Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)

WEBINAR: Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)
by Daniel Nenni on 03-01-2022 at 6:00 am

Mirabilis Webinar AI SoC

Among the multiple technologies that are poised to deliver substantial value in the future, Artificial Intelligence (AI) tops the list.  An IEEE survey showed that AI will drive the majority of innovation across almost every industry sector in the next one to five years.

As a result, the AI revolution is motivating the need for … Read More


Federated Learning Based on Dynamic Regularization to Debias Model Updates

Federated Learning Based on Dynamic Regularization to Debias Model Updates
by Admin on 02-22-2022 at 12:00 am

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The Intel Foundry Ecosystem Explained

The Intel Foundry Ecosystem Explained
by Daniel Nenni on 02-15-2022 at 5:00 am

Intel Tower Semiconductor Acquisition

Exciting times for the semiconductor industry! Last week Intel announced a billion dollar fund to build a foundry ecosystem and today Intel announced they are acquiring foundry Tower Semiconductor for $5.6 billion dollars, WOW! Some people doubted Intel’s commitment to the foundry market this time. I think we can now put that… Read More


Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators

Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators
by Kalar Rajendiran on 02-08-2022 at 10:00 am

Expedera DLA IP Benefits

Using the right tool for the job can be extremely important. Well, maybe not in the case of the famed chef Martin Yan who is notorious for using just one knife—a razor sharp wide blade cleaver that doubles as a spatula—for preparing anything and everything he cooks. For the rest of us, though, the right tools can make all the difference.… Read More


Faster time-to-production for computer vision AI on Arm powered edge devices

Faster time-to-production for computer vision AI on Arm powered edge devices
by Admin on 02-08-2022 at 12:00 am

Faster time-to-production for computer vision AI on Arm powered edge devices, but just how fast is fast?
Speakers:
Davis Sawyer: Cofounder and Chief Product Officer
Charles Marsh: Chief Commercial Officer

When it comes to the deployment of AI applications, it’s never as easy as it

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MBIST Power Creates Lurking Danger for SOCs

MBIST Power Creates Lurking Danger for SOCs
by Tom Simon on 01-25-2022 at 10:00 am

MBIST power emulation

The old phrase that the cure is worse than the disease is apropos when discussing MBIST for large SOCs where running many MBIST tests in parallel can exceed power distribution network (PDN) capabilities. Memory Built-In Self-Test (MBIST) usually runs automatically during power on events. Due to the desire to speed up test and … Read More