I moved from real layout work to management so I had little or no “hands-on” layout in my responsibility but I was very close to my team challenges in all 5 locations. During my 13 years in PMC Sierra I was involved in many initiatives some technical and some in developing relations with vendors. The biggest difference was that MOSAID… Read More
WEBINAR: Is Agentic AI the Future of EDA?The semiconductor industry is entering a transformative era,…Read MoreDon’t Balkanize Automotive Safety
The Wall Street Journal reported, last week, that auto makers are lining up on opposite sides of the talking cars debate. Some car makers – General Motors, Toyota and Volkswagen – are pushing Wi-Fi-based dedicated short range communication technology (DSRC) while others – Ford, Audi and BMW – are emphasizing 5G for the same application.… Read More
Worldwide Design IP Revenue Grew 12.4% in 2017
When starting SemiWiki we focused on three market segments: EDA, IP, and the Foundries. Founding SemiWiki bloggers Daniel Payne and Paul McLellan were popular EDA bloggers with their own sites and I blogged about the foundries so we were able to combine our blogs and hit the ground running. For IP I recruited Dr. Eric Esteve who had… Read More
TSMC Technologies for Mobile and HPC
During TSMC 2018 Technology Symposium, Dr. B.J. Woo, TSMC VP of Business Development presented market trends in the area of mobile applications and HPC computing as well as shared TSMC progress in making breakthrough efforts in the technology offerings to serve these two market segments.
Both 5G and AI are taking the center stage… Read More
Converter Circuit Optimization Gets Powerful New Tool
DC converter circuit efficiency can have a big effect on the battery life of mobile devices. It also can affect power efficiency for wall-power operated circuits. Even before parasitics are factored in, converter circuit designers have a lot of issues to contend with. Optimizing circuit operation is essential for giving consumers… Read More
Semiconductor Specialization Drives New Industry Structure
When traveling the world there are the things that you see and the people that you meet. I have been very fortunate to meet some of the most amazing people and one of those people is Dr. Walden Rhines. Wally spent the first half of his career in semiconductors at TI and the second half in EDA with Mentor Graphics which gives him a cyborg … Read More
Low Power Verification Shifting Left
I normally think of shift left as a way to move functional verification earlier in design, to compress the overall design cycle. But it can also make sense in other contexts, one particularly important example being power intent verification.
If you know anything about power intent, you know that it affects pretty much all aspects… Read More
Cross View Static Validation
Improper handling of design validation could simply translate into a debugging exercise. In mainstream RTL2GDS flow, design implementation involves a top-level integration and lower-level block developments. These lower-level components, comprising of macros, IPs and standard cells are subjected to frequent abstraction… Read More
Formal Signoff – a Cisco Perspective
The second segment of Oski’s most recent “Decoding Formal” event was a talk by Anatoli Sokhatski (formal tech lead at Cisco) on training and methodology development for a structured and scalable approach to formal verification, particularly with emphasis on formal signoff.
Anatoli stressed that he and others in the team did … Read More
AI processing requirements reveal weaknesses in current methods
The traditional ways of boosting computing throughput are either to increase operating frequency or to use multiprocessing. The industry has done a good job of applying these techniques to maintain a steady increase in performance. However, there is a discontinuity in the needs for processing power. Artificial Intelligence… Read More




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