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Semiconductor Expert Forum

Podcast EP43: Navigating the Architecture Exploration Jargons and What Do They Mean to a Chip Architect?

Podcast EP43: Navigating the Architecture Exploration Jargons and What Do They Mean to a Chip Architect?
by Daniel Nenni on 10-15-2021 at 10:00 am
Categories: IP, Mirabilis Design

Dan is joined by Deepak Shankar, founder of Mirabilis Design. Dan explores the application and impact of architectural exploration on chip and system design.

The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, and not to the speaker’s employer, organization, committee or any other group… Read More

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CEO Interview: Rick Seger of SigmaSense

CEO Interview: Rick Seger of SigmaSense
by Daniel Nenni on 10-15-2021 at 6:00 am
Categories: Uncategorized

RickSeger Photo

Rick Seger is a pioneer of the PCAP touch and pen industry. Seger formerly was the President of N-trig, which incorporated PCAP technology with active pen solutions into devices for nearly all major PC OEMs. Microsoft acquired N-trig in 2015, and Seger is now the CEO of SigmaSense, a global leader in touch sensing performance. SigmaSense… Read More

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Webinar – Comparing ARM and RISC-V Cores

Webinar – Comparing ARM and RISC-V Cores
by Daniel Payne on 10-14-2021 at 10:00 am
Categories: IP, Mirabilis Design, RISC-V

Mirabilis Webinar, October 21

Operating systems and Instruction Set Architectures (ISA) can have long lifespans, and I’ve been an engineering user of many ISAs since the 1970s. For mobile devices I’ve followed the rise to popularity of the ARM architecture, and then more recently the RISC-V ISA which has successfully made the leap from university… Read More

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SeaScape: EDA Platform for a Distributed Future

SeaScape: EDA Platform for a Distributed Future
by Daniel Nenni on 10-14-2021 at 6:00 am
Categories: Ansys, Inc., EDA

EDA Platform for a Distributed Future

The electronic design community is well aware that it faces a daunting challenge to analyze and sign off the next generation of huge multi-die 3D-IC systems. Most of today’s EDA tools require extraordinary resources in specialized computers with terabytes of RAM and hundreds of processors. Customers don’t want to keep buying… Read More

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Webinar – SoC Planning for a Modern, Component-Based Approach

Webinar – SoC Planning for a Modern, Component-Based Approach
by Mike Gianfagna on 10-13-2021 at 10:00 am
Categories: EDA, Events, Perforce

Webinar – SoC Planning for a Modern Component Based Approach

We all know that project planning and tracking are critical for any complex undertaking, especially a complex SoC design project. We also know that IP management is critical for these same kinds of projects – there is lots of IP from many sources being integrated in any SoC these days. If you don’t keep track of what you’re using and… Read More

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TSMC Arizona Fab Cost Revisited

TSMC Arizona Fab Cost Revisited
by Scotten Jones on 10-13-2021 at 8:00 am
Categories: Foundries, Semiconductor Services, TechInsights, TSMC
16 Comments

TSMC North America Fabs

Back in May of 2020 I published some comparisons of the cost to run a TSMC fab in Arizona versus their fabs in Taiwan. I found the fab operating cost based on the country-to-country difference to only be 3.4% higher in the US and then I found an additional 3.8% because of the smaller fab scale. Since that time, I have continued to encounter… Read More

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AI and ML for Sanity Regressions

AI and ML for Sanity Regressions
by Bernard Murphy on 10-13-2021 at 6:00 am
Categories: AI, EDA, Synopsys

machine learning for regressions min

You probably know the value proposition for using AI and ML (machine learning) in simulation regressions. There are lots of knobs you can tweak on a simulator, all there to help you squeeze more seconds, or minutes out of a run. If you know how to use those options. But often it’s easier to talk to your friendly AE, get a reasonable default… Read More

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Ansys Talks About HFSS EM Solver Breakthroughs

Ansys Talks About HFSS EM Solver Breakthroughs
by Tom Simon on 10-12-2021 at 10:00 am
Categories: Ansys, Inc., EDA

HFSS scaling over the years

Ansys HFSS™ has long enjoyed industry respect as a highly accurate electromagnetic simulator suitable for general purpose applications. Ansys has worked over the years to maintain its gold reference accuracy, and also to dramatically improve its performance and ease of use. A very interesting review of the key technology breakthroughs… Read More

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ESD Alliance Reports Double-Digit Growth – The Hits Just Keep Coming

ESD Alliance Reports Double-Digit Growth – The Hits Just Keep Coming
by Mike Gianfagna on 10-12-2021 at 6:00 am
Categories: ESD Alliance, Semiconductor Services, Wally Rhines

ESD Alliance Reports Double Digit Growth – The Hits Just Keep Coming

The latest Electronic Design Market Data report was just published. The headline announces continued substantial growth for the sector: Electronic System Design Industry Logs Double-Digit Q2 2021 Year-Over-Year Revenue Growth, ESD Alliance Reports. While not quite the record-breaking growth reported last quarter, the… Read More

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High Reliability Power Management Chip Simulation and Verification for Automotive Electronics

High Reliability Power Management Chip Simulation and Verification for Automotive Electronics
by Daniel Payne on 10-11-2021 at 10:00 am
Categories: EDA, Empyrean

iWave waveform min

Automotive electronics bring strong demand for power management chips, but its strict reliability requirements also pose new challenges for chip designers. The chip needs to be able to work in various harsh environments such as high temperature, low temperature, aging, abnormal power supply, etc. Although the traditional… Read More