DAC 2026: The Trouble with John Cooley’s Troublemaker Panel

For quite a few years, John Cooley has hosted the Troublemaker Panel at DAC. The event consists of a panel of senior executives from the EDA industry. John Cooley asks his readers for “edgy” questions to ask the panelists and on event day, he does just that. Those with complete responses that are backed with real data from real customers do well. Those that come with marketing responses don’t do as well. John’s probing questions and his lack of patience for responses that lack substance or real data can create an entertaining environment for everyone except the person on the hot seat.

I was on this panel many years ago. It was both invigorating and frightening. At last year’s event, the topic of AI in the design flow came up. The technology was still new, and some responses fell short of John’s expectations regarding completeness backed up with real data. The result was some entertaining exchanges about prison analogies among other topics. It was entertaining, but not that informative.

This year, AI has become quite a big topic at DAC, and it was the focus for a lot of John’s panel. The resultant conversation was quite different from last year, however. Perhaps the event was bit less entertaining than last year, but vastly more informative. Here are some of my takeaways from that discussion, and what led to the trouble with John Cooley’s Troublemaker Panel.

The Panel and the Comments

The graphic at the top of this post shows the executives who were on the panel. John did spend a lot of time on AI in the design flow – what it is, how it works, and what impact it’s having. Those weren’t the only areas of exploration, however. What struck me about this year’s event was how well prepared the panelists were and how much AI in the design flow has matured in just one year.

John’s style is direct and probing. He asks hard questions and expects responses that are free of marketing spin. To his credit, he gives everyone the opportunity to express the full detail of their response. If it’s well done, everyone learns something. If it’s not, John isn’t shy to call BS, make an entertaining comment or two, and move on. Those biting comments when a response isn’t up to where it should be have created some entertaining exchanges over the years.

This year, everyone had well thought out responses that were backed up with real data and real customer names. I learned several new insights into some hot topics, and not all of them were about AI. In general, I came away feeling that I learned a lot, and that the implementation of AI in the design flow had come a long way in one short year. It was enlightening, but perhaps not as entertaining as past years, and that’s the trouble with John Cooley’s Troublemaker Panel.

My memory isn’t good enough to recount all the comments that were made, but here are a few that stuck in my head:

Paul Cunningham explained is some detail how level 5 (fully autonomous AI chip design) was becoming real. He cited a lot of progress, mentioning specific achievements and customer names, and it was encouraging. Ravi Subramaniam and Amit Gupta also described substantial progress in this area, again with accomplishments and customer names.

For this part of the discussion, I must give special credit to Amit, who came with a vast list of achievements, all backed up with specific data and customer names. He had a lot of good information to share, and at one point John had to say “enough” and move on. Another interesting point was interoperability. Paul, Ravi and Amit all described the use of standards to facilitate interoperable agentic design flows.

The topic of the Ansys acquisition by Synopsys was also discussed. Ravi did a good job explaining the huge number of new markets and new customers that Ansys added to the Synopsys portfolio.

Wally Rhines provided some valuable context for why he was excited to join Silvaco, a company that has been around a very long time. It turns out that longevity has created deep domain expertise in TCAD and analog design, among other things. That depth of experience has allowed Silvaco to build physics-based digital twin models for semiconductor design and manufacturing. This is a highly valuable asset for many companies.

This is a short summary of what was discussed at the Troublemaker Panel. This year, a lot of progress and insights and less trouble. I left feeling good about the future.

Also Read:

Previewing FMS 2026: The Next Frontier of Enterprise Memory, CXL, and AI-Era Storage

Must-See DAC Panel – Build vs Buy: Who Owns the Intelligence Behind Tomorrow’s Chips?

Why Did Synopsys Really Acquire Ansys?

 

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