Cadence today announced that it is acquiring Forte Design Systems. Forte was the earliest of the high-level synthesis (HLS) companies. There were earlier products. Synopsys had Behavioral Compiler and Cadence had a product whose name I forget (Visual Architect?), but both products were too early and were canceled. Cadence … Read More
Tag: cadence
Who needs DDR4 PHY running at 2667 Mbps?
As of today, DDR4 are targeting server, networking and consumer applications, and it will take another year before we use DDR4 equipped PC at home. In fact, a majority of consumers will rather buy a smartphone or tablet than a PC, most of these devices coming with PLDDR2 and only a few high-end tablets are equipped with LPDDR3 memory.… Read More
Update on a Space-Based Router for IC Design
When I started my IC design career back in 1978 all IC routing was done manually, today however we have many automated approaches to IC routing that save time and do a more thorough job than manual routing. To get an update on space-based routers for IC design I connected with Yuval Shay at Cadence today. The basic idea behind a spaced-based… Read More
High Quality PHY IPs Require Careful Management of Design Data and Processes
In last few years IP design has grown significantly compared to the rest of the semiconductor industry. There are newer IP start-ups opening across the world, particularly in India and China. Amid this rush, I wanted to understand the actual dynamics pushing this business and whether all of these IPs follow quality standards. … Read More
CDNLive World Tour
CDNLive is becoming a real worldwide event, starting in March in San Jose and ending in November in Tel Aviv, Israel.
The complete schedule is:
- March 11-12th, Santa Clara, California
- May 19th-21st, Munich, Germany
- July 15th, Seoul, Korea
- August 15th, Shanghai, China
- August 7th, Hsinchu, Taiwan
- August 11-12th, Bangalore, India
What will drive MEMS to drive I-o-T and I-o-P?
By I-o-P, I mean Internet-of-People- I couldn’t think of anything better than this to describe a technology which becomes your custodian for everything you do; you may consider it as your good companion through life or an invariably controlling spy. This is obvious with the embedded sensor techno-products such as Kolibree, a … Read More
Parasitic Debugging in Complex Design – How Easy?
When we talk about parasitic, we talk about post layout design further expanded in terms of electrical components such as resistances and capacitances. In the semiconductor design environment where multiple parts of a design from different sources are assembled together into highly complex, high density SoC, imagine how complex… Read More
The Semiconductor Landscape – III
In continuation to my earlier observations and anticipations (landscape1, landscape2) which came up to my expectations, I was further inspired to ponder over the macros of our ever growing semiconductor industry. We may argue the business is stagnating, we may argue that the pace of scaling is slowing, but when I look back at the… Read More
How to Optimize Analog IPs for High-end SoCs?
Gone are the days when analog design had its sweet space on a single chip. However, it’s the main driver in this new electronic world which is geared by Internet-of-Things, wireless, mobile, remote control and so on. How does an electronic device sense a touch by human, motion, temperature, sound etc.? It’s the analog circuitry … Read More
The Most Popular Blog Posts at Cadence in 2013
I spend about an hour a day reading blogs from EDA companies, foundries, independent bloggers and of course, SemiWiki. Richard Goering at Cadence assembled a top 10 list of the most popular blogs posted on their site in 2013, revealing that engineers were most interested in: FinFETs, 20nm and smaller nodes, memory technology and… Read More