The Most Interesting CEO in Semiconductors!

The Most Interesting CEO in Semiconductors!
by Daniel Nenni on 10-21-2020 at 6:00 am

GTC 2020 Lip Bu Tan

Hands down, without a doubt, the most interesting CEO in semiconductors is Lip-Bu Tan, founder of Walden Capitol and current CEO of Cadence Design Systems. If you want to talk about a man with a plan it’s Lip-Bu Tan.

Before we get into the fireside chat between Tom Caufield and Lip-Bu at the GTC 2020 Virtual event let’s do a quick biography:… Read More


Debugging in Conformal Low Power: GUI and Non-GUI Approach

Debugging in Conformal Low Power: GUI and Non-GUI Approach
by Admin on 10-14-2020 at 12:00 am

Overview

Static low-power verification enables engineers to verify and debug multimillion-gate designs optimized for low power, without complex and time-consuming simulations. However, understanding these IEEE 1801 violations and diagnosing the root cause can become challenging without a user-friendly debug infrastructure.

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Reduce Design Time with PCB Productivity Toolbox

Reduce Design Time with PCB Productivity Toolbox
by Admin on 10-13-2020 at 12:00 am

Overview 

Biggest loss in designer productivity occurs in the editing and tweaking of designs leading to lowest performance gain per unit of time. Under a very tight schedule, it comes down to zero. It can be significantly improved with Cadence’s Allegro PCB Productivity Toolbox.

Cadence’s Allegro PCB Productivity Toolbox

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Tempus: Delivering Faster Timing Signoff with Optimal PPA

Tempus: Delivering Faster Timing Signoff with Optimal PPA
by Mike Gianfagna on 10-12-2020 at 10:00 am

Tempus Delivering Faster Timing Signoff with Optimal PPA

In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More


WEBINAR: ACCELERATE DESIGN PRODUCTIVITY WITH VIRTUOSO ADE EXPLORER AND ASSEMBLER

WEBINAR: ACCELERATE DESIGN PRODUCTIVITY WITH VIRTUOSO ADE EXPLORER AND ASSEMBLER
by Admin on 07-08-2020 at 12:00 am

With the emergence of new ISO standards, advanced-node designs, and system design

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