WEBINAR: ACCELERATE DESIGN PRODUCTIVITY WITH VIRTUOSO ADE EXPLORER AND ASSEMBLER

WEBINAR: ACCELERATE DESIGN PRODUCTIVITY WITH VIRTUOSO ADE EXPLORER AND ASSEMBLER
by Admin on 07-08-2020 at 12:00 am

With the emergence of new ISO standards, advanced-node designs, and system design

Read More

Webinar: Accelerate Data Set Processing to Verify Custom and Mixed-Signal Designs

Webinar: Accelerate Data Set Processing to Verify Custom and Mixed-Signal Designs
by Admin on 07-02-2020 at 3:00 pm

Overview 

Simplify the exchange of data, boost your analytic capabilities, and shorten your design cycles. Using the integration of MathWorks MATLABCadence® Virtuoso® ADE Product Suite, and Cadence Spectre® simulation platform , you can accelerate processing of your large data sets when verifying custom, RF, or mixed-signal

Read More

Webinar: Improve Device Matching with Assisted Component P&R

Webinar: Improve Device Matching with Assisted Component P&R
by Admin on 07-01-2020 at 9:00 am

Overview

The increased analog content of today’s ICs needs more automation and reuse during the custom layout process. These circuits frequently use structures requiring precise matching of device characteristics.

Module generators (ModGens) in the Cadence® Virtuoso® Layout Suite address these precise matching requirements

Read More

Webinar Series: Digital Implementation and Signoff

Webinar Series: Digital Implementation and Signoff
by Admin on 07-01-2020 at 12:00 am

Webinar Series

Webinars are chosen during registration

Reduce Iterations, Achieve Faster Design Closure Time with Innovus Implementation and Tempus ECO Option

Wednesday, July 1, 2020
15:00 UKT / 16:00 CEST / 17:00 EEST/IDT / 10:00 AM EDT

Speaker: Thierry Sarrazin

The Cadence® Tempus™ Timing Signoff Solution is integrated

Read More

WEBINAR: RF AMPLIFIER SIMULATION USING ADI MODELS WITHIN AWR DESIGN ENVIRONMENT

WEBINAR: RF AMPLIFIER SIMULATION USING ADI MODELS WITHIN AWR DESIGN ENVIRONMENT
by Admin on 06-25-2020 at 10:00 am

Webinar Details

RF Amplifier Simulation Using ADI Models Within AWR Design Environment
Date: Thursday, June 25, 2020
Time: 10:00am PDT

Questions about this event?

Send email to: events@cadence.com

This webinar will showcase the latest RF amplifier model library from Analog Devices, Inc. (ADI) that support the Cadence® AWR… Read More


Technology Day: Adopting Effective Power Analysis Strategies from System to Silicon

Technology Day: Adopting Effective Power Analysis Strategies from System to Silicon
by Admin on 06-25-2020 at 10:00 am

Overview

Power analysis is critical throughout the lifecycle of a program. Effective power analysis requires different strategies and tools depending on where you are in that lifecycle. In this webinar, we will cover the Cadence® solutions for power analysis starting with early system-level analysis, through RTL-level architecture/

Read More

Webinar Series: Digital Implementation and Machine Learning

Webinar Series: Digital Implementation and Machine Learning
by Admin on 06-24-2020 at 3:00 pm

Webinar Series

Webinars are chosen during registration

Digital Implementation Flow Automation and Vivid Design Metrics Visualisation

June 10, 2020; 15:00 (UKT) 16:00 (CEST) 17:00 (EEST/IDT)

Speaker: Benoir Carpentier

Creating a final design is a sequence of operations from RTL synthesis, through implementation to sign-off.

Read More