Overcoming System-Level 3D-IC Electrical and Thermal Challenges

Overcoming System-Level 3D-IC Electrical and Thermal Challenges
by Admin on 04-06-2022 at 12:00 am

Overview

Electronics products with 3D-ICs face growing system challenges related to signal, power, and thermal integrity. Design density can lead to performance issues caused by heat, crosstalk, and power noise.

Addressing these concerns through simulation during system planning and continuing through signoff will accelerate… Read More


Cadence and DesignCon – Workflows and SI/PI Analysis

Cadence and DesignCon – Workflows and SI/PI Analysis
by Daniel Nenni on 04-02-2022 at 6:00 am

Clarity 3D solver 112Gbps

DesignCon 2022 is back to a live conference, from Tuesday, April 5th through Thursday, April 7th, at the Santa Clara Convention Center.

Introduction

DesignCon is a unique gathering in our industry.  Its roots incorporated a focus on complex design and analysis requirements of (long-reach) high-speed interfaces.  Technical… Read More


3D-IC Chip-Centric Power and Thermal Integrity with High-Performance Hiearchical Analysis

3D-IC Chip-Centric Power and Thermal Integrity with High-Performance Hiearchical Analysis
by Admin on 03-23-2022 at 12:00 am

Overview

A 3D-IC includes the package, interposer, multiple chiplets, through-silicon vias (TSVs), and through-dielectric vias (TDVs).  Supplying power to the chiplets and dissipating heat through these various components poses a major power integrity (PI) and thermal integrity challenge. Early analysis also is extremely… Read More


Podcast EP67: Corigine Combines Emulation and Prototyping

Podcast EP67: Corigine Combines Emulation and Prototyping
by Daniel Nenni on 03-18-2022 at 10:00 am

Dan is joined by Jeff Critten, VP of sales at Corigine. They discuss the unique capabilities of Corigine that allows support of both emulation and prototyping in one platform.

Jeff Critten has been in the EDA industy for over 25yrs.  He started with Cadence as a verification AE in 1997 and moved into a sales role where he was promoted… Read More


Analog Fault Injection Simplifies ISO 26262 Compliance

Analog Fault Injection Simplifies ISO 26262 Compliance
by Admin on 03-17-2022 at 12:00 am

Overview

As the automotive market moves toward electrified drivetrains and autonomous driving systems, chip makers increasingly need to design integrated mixed-signal chips that meet the ISO 26262 automotive certification. With these complex designs, designers will require automation to overcome the limits of using expert… Read More


Leveraging Virtual Platforms to Shift-Left Software Development and System Verification

Leveraging Virtual Platforms to Shift-Left Software Development and System Verification
by Kalar Rajendiran on 03-15-2022 at 6:00 am

Extend Accuracy with Hybrid Platforms

Ever since the cost of development started growing exponentially, engineering teams have been deploying a shift-left strategy to software development and system verification. While this has helped contain cost and accelerated product development schedules, a shift-left strategy is not without challenges. A virtual platform… Read More


System Planning and Implementation for Different 3D-IC Design Styles

System Planning and Implementation for Different 3D-IC Design Styles
by Admin on 03-09-2022 at 12:00 am

March 9, 2022

Overview

System planning is a major part of the multi-chiplet design. Whether it’s a 2.5-D configuration with an interposer or full-stacked 3D design mounted on a package, it is important to have an automated way to do bump assignment and optimization along with 3D structures implementation. With methodology evolving

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Introduction to the Joules RTL Power Solution

Introduction to the Joules RTL Power Solution
by Admin on 03-08-2022 at 12:00 am

08 Mar 2022

Online

Event Details

Want to take a tour of this powerful power estimation tool and gear up so you understand the Joules flow?

Join Cadence Training and Sr Principal Education Application Engineer Neha Joshi for this free technical Training Webinar.

Built on a multi-threaded frame-based architecture, the Cadence

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The Intel Foundry Ecosystem Explained

The Intel Foundry Ecosystem Explained
by Daniel Nenni on 02-15-2022 at 5:00 am

Intel Tower Semiconductor Acquisition

Exciting times for the semiconductor industry! Last week Intel announced a billion dollar fund to build a foundry ecosystem and today Intel announced they are acquiring foundry Tower Semiconductor for $5.6 billion dollars, WOW! Some people doubted Intel’s commitment to the foundry market this time. I think we can now put that… Read More