NanoSpice Pro X Webinar SemiWiki
WP_Term Object
(
    [term_id] => 31
    [name] => GlobalFoundries
    [slug] => globalfoundries
    [term_group] => 0
    [term_taxonomy_id] => 31
    [taxonomy] => category
    [description] => 
    [parent] => 158
    [count] => 240
    [filter] => raw
    [cat_ID] => 31
    [category_count] => 240
    [category_description] => 
    [cat_name] => GlobalFoundries
    [category_nicename] => globalfoundries
    [category_parent] => 158
)

Standard Node Trend

Standard Node Trend
by Scotten Jones on 07-15-2017 at 4:00 pm

I have previously published analysis’ converting leading edge logic processes to “standard nodes” and comparing standard nodes by company and time. Recently updated details on the 7nm process node have become available and in this article, I will revisit the standard node calculations and trends.

Traditional node names
For decades, the semiconductor industry has used nodes to describe logic processes. Down to around 500nm the node name corresponded to the physical gate length. From 500nm down to approximately 130nm the gate length shrank faster than the node names and then gate length started shrinking more slowly than the node names. With the advent of FinFETs physical gate length is now longer than the node name. Figure 1 illustrates the physical gate length divided by node name versus node.


Figure 1. Gate length divided by node versus node.

Standard Nodes
To develop a node name that is related to actual process features ASML began plotting node versus contacted poly half pitch multiplied by minimum metal half pitch. The contacted poly and minimum metal half pitches are factors in determining cell size. I have done my own version of the ASML analysis plotting node versus contacted poly pitch (CPP) multiplied by minimum metal pitch (MMP). The resulting graph for 54 processes from 12 companies is plotted in figure 2.


Figure 2. Node versus CPP x MMP.

The data in figure 2 is from 130nm to 7nm and includes the latest 7nm process data.

Using the formula derived from the plot in figure 2 I have plotted standard node versus time for 16nm/14nm, 10nm and 7nm by company and that plot is illustrated in figure 3.


Figure 3. Standard node versus time by company.

From figure 3 we can see that Intel’s 14nm process took the node lead in 2014 with a standard node value of 12.4. Samsung’s 10nm process took the lead in early 2016 with a standard node value of 11.5 and then TSMC’s 10nm process took the lead in late 2016 with a standard node value of 10.0. Early this year Intel’s 10nm process took the lead back with a standard node value of 8.0 and that vale is as low as any of the foundry 7nm processes.

New Standard Nodes
The problem with the original standard node formulation is it is CPP and MMP based only and does not include tracks. The height of a standard cell is actual tracks x MMP and scaling down tracks has become prevalent in recent process generations. I have now taken processes that I have CPP, MMP and track value for and plotted node versus CPP x MMP x tracks, see figure 4.


Figure 4. Standard node versus CPP x MMP x tracks.

I should note here that even CPP x MMP x tracks is not a complete metric. There are a variety of secondary effects it does not include. Intel has tried to address some of the secondary effects in a metric they have proposed but even that metric doesn’t include all the routing related rules that are key to complex system on a chip designs.

Despite the limitations of CPP x MMP x tracks as a metric it is a metric I can get a reasonable amount of data on. A true comparison would need complex IP blocks to be implemented in all of the leading edge processes and data on area to be published. To the best of my knowledge that isn’t available.

Figure 5 presents the new standard node values versus time for 16nm/14nm, 10nm and 7nm processes by company.


Figure 5. New standard node versus time by company.

From figure 5 we can see that once again Intel takes the lead in 2014 with their 14nm process with a standard node value of 12.1. Samsung and then TSMC take the lead in 2017 with their 10nm processes having standard node values of 11.2 and 10.3 respectively. Intel takes the lead back in early 2017 with their 10nm process with a new standard node value of 8.3. In late 2017 TSMC takes the lead back with their 7nm with a standard node of 7.9 before GLOBALFOUNDRIES takes the lead in early 2018 with their 7nm process with a standard node value of 7.8.

Conclusion

By either the old or the new standard node values Intel has lost their multiyear density lead over the foundries. Based on the new more accurate standard node value the average node value for Intel’s 10nm and the foundry 7nm processes is 8.05nm and all four companies are within a 0.5nm standard node value of each other.

Share this post via:

Comments

31 Replies to “Standard Node Trend”

You must register or log in to view/post comments.