Highlights of the “Intel Accelerated” Roadmap Presentation

Highlights of the “Intel Accelerated” Roadmap Presentation
by Tom Dillinger on 07-30-2021 at 6:00 am

ribbon FETs

Introduction

Intel recently provided a detailed silicon process and advanced packaging technology roadmap presentation, entitled “Intel Accelerated”.  The roadmap timeline extended out to 2024, with discussions of Intel client, data center, and GPU product releases, and especially, the underlying technologies to be … Read More


Intel Accelerated

Intel Accelerated
by Scotten Jones on 07-27-2021 at 6:00 am

Intel Process Name Decoder

Intel presented yesterday on their plans for process technology and packaging over the next several years. This was the most detailed roadmap Intel has ever laid out. In this write up I will analyze Intel’s process announcement and how they match up with their competitors.

10nm Super Fin (SF)

10nm is now in volume production in three… Read More


Resist Development for High-NA EUV

Resist Development for High-NA EUV
by Tom Dillinger on 07-01-2021 at 10:00 am

EUV scaling

The successful transition to a new fabrication process from development to high volume manufacturing requires a collective, collaborative effort among process engineers, equipment manufacturers, and especially, chemical suppliers.  Of particular importance is the chemistry of the photoresist materials and their interaction… Read More


Ten Lessons Learned from Andy Grove

Ten Lessons Learned from Andy Grove
by Betsy Corcoran on 06-20-2021 at 6:00 am

Andy Grove SemiWiki

I met Andy Grove on a sunny day in New York City in 1987. He was dashing to press interviews for his just-off-the-presses management book, “One on One with Andy Grove.” I was a freshly badged member of the press working for IEEE Spectrum, a year or so out of college, still toting my college backpack. Little did I know that that would be Read More


TSMC and the FinFET Era!

TSMC and the FinFET Era!
by Daniel Nenni on 06-09-2021 at 6:00 am

Intel 22nm wafer

While there is a lot of excitement around the semiconductor shortage narrative and the fabs all being full, both 200mm and 300mm, there is one big plot hole and that is the FinFET era.

Intel ushered in the FinFET era only to lose FinFET dominance to the foundries shortly thereafter. In 2009 Intel brought out a 22nm FinFET wafer at the… Read More


Supply Issues Limit 2021 Semiconductor Growth

Supply Issues Limit 2021 Semiconductor Growth
by Bill Jewell on 05-23-2021 at 10:00 am

Top Semiconductor Revenues 2021

Worldwide semiconductor shipments were $123.1 billion in 1Q 2021, up 3.6% from 4Q 2020 and up 17.8% from a year ago, according to WSTS. The 3.6% quarter-to-quarter growth was the highest for a first quarter since 1Q 2010, eleven years ago. The strong growth in 1Q21 implies strong growth in the following quarters and for the year 2021.… Read More


Is IBM’s 2nm Announcement Actually a 2nm Node?

Is IBM’s 2nm Announcement Actually a 2nm Node?
by Scotten Jones on 05-09-2021 at 6:00 am

Slide1

IBM has announced the development of a 2nm process.

IBM Announcement

What was announced:

  • “2nm”
  • 50 billion transistors in a “thumbnail” sized area later disclosed to be 150mm2 = 333 million transistors per millimeter (MTx/mm2).
  • 44nm Contacted Poly Pitch (CPP) with 12nm gate length.
  • Gate All Around (GAA), there are several ways
Read More

You know you have a problem when 60 Minutes covers it!

You know you have a problem when 60 Minutes covers it!
by Robert Maire on 05-03-2021 at 2:00 pm

60 Minutes Chip Shortage

-Chip shortage on 60 Minutes- Average Joe now aware of chip issue
-Intel sprinkling fairy dust (money) on New Mexico & Israel
-Give up on buy backs and dividends
-Could Uncle Sam give a handout to Intel?

You normally don’t want to answer the door if 60 Minutes TV crew is outside as it likely doesn’t mean good things.… Read More


Intel’s EMIB Packaging Technology – A Deep Dive

Intel’s EMIB Packaging Technology – A Deep Dive
by Tom Dillinger on 05-03-2021 at 6:00 am

EMIB configurations

The evolution of low-cost heterogeneous multi-chip packaging (MCP) has led to significant system-level product innovations.  Three classes of MCP offerings have emerged:

  • wafer-level fan-out redistribution, using reconstituted wafer substrates of molding compound as the surface for interconnections between die (2D)
Read More

Ireland – A Model for the US on Technology

Ireland – A Model for the US on Technology
by Scotten Jones on 05-02-2021 at 6:00 am

Slide1 2

After I published a recent article about Intel, I was contacted by the Irish Development Agency (IDA) where Intel has a large fab presence and asked if I would like to interview them about the Intel site. The interview with Turlough McCormack of the IDA, started with Intel’s presence in Ireland but then went on to paint an interesting… Read More