Image RemovedThe International Electron Devices Meeting is a premier event to learn about the latest in semiconductor process technology. Held every year in early December is San Francisco this years conference will be held from Decembers 7th through December 11th. You can learn more about the conference at their web site here… Read More
Image RemovedThe IEEE International Electron Devices Meeting is in my opinion the leading technology conference to understand the current state-of-the-art in semiconductor process technology. Held each year in early December in San Francisco it is a must attend conference for anyone following technology development. The… Read More
Image RemovedLast year at Semicon I sat down with Soitec and got an update on the company. You can read my write up from last year here. A key point last year was Soitec was continuing to be profitable and grow after several years of financial struggles.
On Thursday, July 11th I got to sit down with Soitec’s CEO, Paul Boudre and … Read More
On Wednesday, July 10th I got to sit down with Gary Patton, CTO and SVP of worldwide research and development of Global Foundries and get an update on how the company is doing.
We started with a discussion of Global Foundries (GF) general business health. Revenue for the year is expected to be around $6 billion dollars. They are focused… Read More
Tuesday July 9th was the first day the show floor was open at Semicon. The following is a summary of some announcements I attended and general observations.
AMAT Announcement
My day started with an Applied Materials (AMAT) briefing for press and analysts where they announced “the most sophisticated system they have ever released… Read More
On Monday, July 8th Imec held a technology forum ahead of Semicon West. I saw the papers presented and interviewed three of the authors. The following is a summary of what I feel are the keys points of their research.
Arnaud Furnemont
Arnaud Furnemont’s talk was titled “From Technology Scaling to System Optimization”. Simple 2D … Read More
At the SPIE Advanced Lithography Conference Imec presented several design papers and I have had the opportunity to review the papers and speak with the authors. In this summary I am going to address three emerging areas in order of when I think they may be implemented from soonest to latest.
Specifically, I will discuss:
Samsung and TSMC have both made recent disclosures about their 5nm process and I though it would be a good time to look at what we know about them and compare the two processes.
A lot of what has been announced about 5nm is in comparison to 7nm so we will first review 7nm.
7nm
Figure 1 compares Samsung’s 7LPP process to TSMC’s 7FF and 7FFP… Read More
At the SPIE Advanced Lithography Conference Imec presented several papers on EUV and Veeco presented about etching for EUV masks. I had the opportunity to see the presentations and speak with some of the authors. In this article I will summarize the key issues around EUV based on this research.
EUV is ramping up into high volume 7nm… Read More
At the SPIE Advanced Lithography Conference ASML gave an update on both the current 0.33NA system and the 0.55 high-NA system development. I saw the presentations and got to sit down with Mike Lercel (Director of Strategic Marketing).… Read More
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