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Semiconductor Expert Forum

Podcast EP68: The Foundation of Computational Electromagnetics

Podcast EP68: The Foundation of Computational Electromagnetics
by Daniel Nenni on 03-25-2022 at 10:00 am
Categories: Uncategorized

Dan is joined by Dr. Matthew Commens, product manager Ansys. Matt discusses an upcoming webinar series on the inner workings and capabilities of Ansys simulation software. How the series began, the impact and benefits and a view of the future are all covered.

Webinar Series: Learn the Foundation of Computational Electromagnetics… Read More

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WEBINAR: Overcome Aging Issues in Clocks at Sub-10nm Designs

WEBINAR: Overcome Aging Issues in Clocks at Sub-10nm Designs
by Daniel Nenni on 03-25-2022 at 8:00 am
Categories: EDA, Events, Infinisim

Infinisim Webinar

We all know that designers work hard to reach design closure on SOC designs. However, what gets less attention from consumers is the effort that goes into ensuring that these chips will be fully operational and meeting timing specs over their projected lifetime. Of course, this is less important for chips used in devices with projected… Read More

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Electronics, COVID-19, and Ukraine

Electronics, COVID-19, and Ukraine
by Bill Jewell on 03-25-2022 at 6:00 am
Categories: Semiconductor Intelligence, Semiconductor Services

Electronics Production 2022

The outlook for electronics and semiconductors in 2022 is uncertain. Just as the world was returning to more normal conditions after (hopefully) the worst of the COVID-19 pandemic is over, Russia invaded Ukraine in February.

The International Monetary Fund (IMF) in a March 15 blog post asserted the Russian invasion of Ukraine… Read More

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Analog Design Acceleration for Chiplet Interface IP

Analog Design Acceleration for Chiplet Interface IP
by Tom Simon on 03-24-2022 at 10:00 am
Categories: Blue Cheetah Analog Design, Chiplet, IP

Analog Generators Boost Designer Productivity

Compared to the automation of digital design, the development of automation for analog has taken a much more arduous path. Over the decades there have been many projects both academic and commercial to accelerate and improve the process for analog design. One of the most interesting efforts in this area is being spearheaded by … Read More

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Experimenting for Better Floorplans

Experimenting for Better Floorplans
by Bernard Murphy on 03-24-2022 at 6:00 am
Categories: Arteris, IP

Repartitioning min

There is sometimes an irony in switching to a better solution in design construction or analysis. The new approach is so much better that you want to experiment to further optimize the design. Which then exposes another barrier to enjoying that newfound freedom. SoC design teams often find this when switching from crossbar interconnect… Read More

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The EUV Divide and Intel Foundry Services

The EUV Divide and Intel Foundry Services
by Scotten Jones on 03-23-2022 at 10:00 am
Categories: Foundries, Intel Foundry, Lithography, Samsung Foundry, Semiconductor Services, TechInsights, TSMC
37 Comments

Intel IDM 2.0 Process Roadmap
The EUV Divide

I was recently updating an analysis I did last year that looked at EUV system supply and demand, while doing this I started thinking about Intel and their Fab portfolio.

If you look at Intel’s history as a microprocessor manufacturer, they are typically ramping up their newest process node (n), in volume production… Read More

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Webinar: Simulate Trimming for Circuit Quality of Smart IC Design

Webinar: Simulate Trimming for Circuit Quality of Smart IC Design
by Daniel Nenni on 03-23-2022 at 6:00 am
Categories: EDA, Events, MunEDA

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Advanced semiconductor nanometer technology nodes, together with smart IC design applications enable today very complex and powerful systems for communication, automotive, data transmission, AI, IoT, medical, industry, energy harvesting, and many more.

However, more aggressive time-to-market and higher performance… Read More

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Co-Developing IP and SoC Bring Up Firmware with PSS

Co-Developing IP and SoC Bring Up Firmware with PSS
by Kalar Rajendiran on 03-22-2022 at 10:00 am
Categories: EDA, Events, IP, Siemens EDA

Creating a Driver

With ever challenging time to market requirements, co-developing IP and firmware is imperative for all system development projects. But that doesn’t make the task any easier. Depending on the complexity of the system being developed, the task gets tougher. For example, different pieces of IP may be the output of various teams… Read More

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Optimizing AI/ML Operations at the Edge

Optimizing AI/ML Operations at the Edge
by Tom Simon on 03-22-2022 at 6:00 am
Categories: AI, Codasip, IP

Optimizing Edge Based AI ML

AI/ML functions are moving to the edge to save power and reduce latency. This enables local processing without the overhead of transmitting large volumes of data over power hungry and slow communication links to servers in the cloud. Of course, the cloud offers high performance and capacity for processing the workloads. Yet, … Read More

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Webinar Series: Learn the Foundation of Computational Electromagnetics

Webinar Series: Learn the Foundation of Computational Electromagnetics
by Matt Commens on 03-21-2022 at 10:00 am
Categories: Ansys, Inc., EDA, Events

image 2 for semiwiki blog

The electromagnetism problems upon which we spent many hours laboring away on homework in college has a mathematical formulation originally developed by Maxwell, Lorentz, Gauss, Faraday and others. In their full forms, these formulas are partial differential equations that come in many versions – both differential and integral.… Read More