Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?search/240757/&c[users]=Fred+Chen&o=date
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Search results

  1. F

    Intel is industry’s first mover on High NA EUV lithography system.

    Keeping things off the cloud would require lots of DRAM at the client side.
  2. F

    Intel is industry’s first mover on High NA EUV lithography system.

    Investment is not collaboration; the statement implied 30 years of continued hands-on collaboration with Intel on the project.
  3. F

    Kirin 9000s Analysis: Should be Made by SMIC's N+2 Process

    Is the 1.8 million referring to P60 or Mate 60? The P60 is using the Snapdragon 8+ indeed, but that is not domestic. One analyst predicted Huawei to sell only 60 million (across all models) this year: https://www.reuters.com/technology/chinas-huawei-start-selling-pura-70-smartphones-2024-04-18/...
  4. F

    Kirin 9000s Analysis: Should be Made by SMIC's N+2 Process

    It looks like the Pura 70 forecast of 10.4 million domestically generated would be too optimistic compared to the P60 only 1.8 million generated from TSMC? Aside, Huawei Mate 60 allegedly crossed 30 million, is that disputed?
  5. F

    Kirin 9000s Analysis: Should be Made by SMIC's N+2 Process

    The P60 is using the Snapdragon 8+ Gen 1 which uses a 4nm process from TSMC. Presumably the chip supply would not be the limiter of sales.
  6. F

    Huawei Pura 70 smartphone sales start; chip still a mystery

    HONG KONG/SHENZHEN/SHANGHAI, April 18 (Reuters) - Chinese technology giant Huawei started selling two models of its highly anticipated, high-end Pura 70 smartphone series on Thursday that many analysts expect to contain an advanced China-made chip like its Mate 60 handset. The Pura series...
  7. F

    Intel is industry’s first mover on High NA EUV lithography system.

    High-NA customers need some strategy for the mask as well. Multilayer, absorber, and Intel now wants to change mask size as well (they didn't plan it with ASML earlier)?
  8. F

    Intel is industry’s first mover on High NA EUV lithography system.

    Wait until they consider NVIDIA's (or their own) large dies.
  9. F

    Intel is industry’s first mover on High NA EUV lithography system.

    30 years, that's obviously wrong. Nikon was still the preferred litho vendor for Intel back then.
  10. F

    Intel is industry’s first mover on High NA EUV lithography system.

    "High NA EUV is the next-generation lithography system developed by ASML following decades of collaboration with Intel." A misleading statement from Intel, as if they co-owned it for decades.
  11. F

    TSMC Q1 2024 Discussion

    Any reason given for the drop in 3nm? Is it just "smartphone seasonality"?
  12. F

    5 things you should know about High NA EUV lithography

    HS: understood. Checking the most recent CAR (probably more mainstream) literature, more or less the same trend toward reported sizing dose being higher, quite often significantly, than 30 mJ/cm2...
  13. F

    5 things you should know about High NA EUV lithography

    They had doses as high as over 80 mJ/cm2 here https://www.spiedigitallibrary.org/conference-proceedings-of-spie/12957/129570V/Patterning-optimization-for-single-mask-bit-line-periphery-and-storage/10.1117/12.3010934.full#_=_ when MOR was used.
  14. F

    5 things you should know about High NA EUV lithography

    ASML did report on NXE:3800E getting >500W (but <505W): https://www.spiedigitallibrary.org/conference-proceedings-of-spie/12953/129530V/High-power-EUV-light-sources-500w-for-high-throughput-in/10.1117/12.3010463.full#_=_ But TSMC earlier talked about pellicles not surviving long enough at 400W...
  15. F

    Semiconductor equipment maker ASML ships second 'High NA' EUV machine

    Some defects already visible from the tweeted image lol
  16. F

    5 things you should know about High NA EUV lithography

    The higher NA only improves the resolution of the so-called aerial image (image in space) not the actual resist image. The resist image contrast is limited further by photoelectrons, which can travel as far as 15 nm (in one direction) in one evaluated resist. They also didn't mention that in...
  17. F

    imec study of EUV stochastic defects in wafer yield at SPIE 2024

    Just read this paper, it turns out they are calibrating to previous papers' assumptions of defect density, but the trends they got were as expected.
  18. F

    Japan chipmaker Rapidus opens arm in Nvidia's backyard from Nikkei Asia

    Yes they hope to do single-wafer processing: https://www.eetimes.com/rapidus-ceo-chasing-single-wafer-processing-dream/
  19. F

    America’s Big Chipmaking Blunder

    They shouldn't let Bloomberg talk tech. They actually think 2D layers are being used.
  20. F

    US lawmakers angry after Huawei unveils laptop with new Intel AI chip

    It should be a big deal, this is Meteor Lake, with all the advanced chiplets.
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