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I'm pretty sure China hasn't finalized any EUV light source. Chinese published research in this area is very active. They've covered 11 nm wavelength with Xe plasma (as the Russians have), and have moved on to 6.7 nm wavelength (half ASML's wavelength) with Gd plasma. The synchrotron in Shanghai...
Agreed that with the move to chiplets, packaging becomes the new frontier, e.g., the Ascend 910C and future versions. In China, packaging for Huawei is not likely to be done by SMIC but by an OSAT like JCET.
It's hard to understand the definition of "catch up" in China. Sometimes, it appears...
China has been doing its own EUV work using the synchrotron at Shanghai. Assuming it has access to SPIE papers (there are also SPIE publications from China), it is probably up to speed on EUV issues status. It likely won't jump in with the stochasticity being well-known by now.
This is where you can be sure the story is bogus. The parts can only fit the system they were built for. A Nikon or Canon part obviously won't fit. Used EUV mirrors were on the market? From whom?
By Chris Mellor November 21, 2025
The NAND industry is facing a 3-year NAND chip output shortage as new fabs will take years to build.
This was the message from Solidigm at an A3 Tech Live session in London. The company is a 100 percent owned subsidiary of SK hynix who bought it from Intel...
So far, all that TechInsights has released without subscription is that it had "aggressively scaled metal pitch using DUV multi-patterning." So it's possible.
Their own High-NA update a few days ago makes no mention of any node, let alone 14A.
https://community.intel.com/t5/Blogs/Intel-Foundry/Systems-Foundry-for-the-AI-Era/How-Collaboration-in-High-NA-EUV-and-Transistor-R-D-Are-Shaping/post/1730050
The launch of Pax Silica ended the fragile trade truce established between President Trump and President Xi Jinping in November 2025. Chinese officials see the initiative as a fundamental threat to their industrial goals and a violation of that agreement’s spirit.
In response, China’s Ministry...
Taiwan’s status was one of the most closely watched aspects of the summit. As home to TSMC and a central player in the semiconductor industry, Taiwan was designated a “guest contributor” rather than a founding member. State Department officials highlighted Taiwan’s importance as a trading...
EUV lithography patterned intricate layers with small feature on a wafer using a reflective EUV mask. However, the EUV lithographic environment, often containing water vapor and hydrocarbons, introduces molecular contamination from secondary EUV electrons, degrading reflectance stability ...
Actually TSMC N7 to N5 M2 pitch shrink (40 nm to 35 nm) wasn't enough by itself to justify a node change. Gate pitch shrink was also significant for transistor density. You might say, SMIC lagged in gate pitch too much from N+2. Yet, the patterning for gate pitch won't change, so that is not the...
TSMC N6 changed diffusion break from double to single, that in itself is enough to put it above 100 MTr/mm2. So it is a noticeable jump in density from earlier 7nm. The design rules were (supposedly) the same as N7 though I think gate pitch shrunk to 54 nm to get the number below.
I had...
