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Intel 18A Process Node Offers 25% Higher Frequency At ISO & 36% Lower Power At Same Frequency Versus Intel 3, Over 30% Density

Arrow lake does not run on INtel 3
Arrow Lake-U is Meteor Lake-U ported from Intel 4 to Intel 3. These are high volume notebooks primarily sold in enterprise setting (like for office jobs that don't need lot of compute. i.e. browsing internet, MS office & emailing etc).

You can check any of the U series processor in Arrow Lake to verify here.


1750276886237.png


GR+SF+CF+DR is less than 10M processors in 2025
No one is denying that, hence why I said it will scale volume in 2025 & 2026. Also GNR & SRF compute tiles and base cache tile for DMR & CWF are large dies compared to roughly 100-200 sq-mm dies for client CPUs. They need considerably more wafer volume compared to like for like units of Clients CPUs.
Panther lake launch is in 2026
Panther Lake is end of 2025 per recent Intel Management commentary (At least one SKU in 2025 - but I understand that could be a SKU with out the Intel 3 iGPU tile).
Most Intel silicon is Intel 7 or older to this day.
Not denying this but I only said "Intel makes <%5 of its processors on Intel 3" is not up to date anymore. Because we already know they had ~5% EUV wafer volume in 2024. So I expect it to be larger than that + the reasons I mentioned above.
 
Does the Backside power delivery portion of Intel 18A use DUV or EUV?

The chart below implies less EUV equipment may be needed to fab chips, but doesn't talk about what's required outside of M0-M2 (which I presume are still traditional top-side layers).

1750278781064.png
 
Arrow Lake-U is Meteor Lake-U ported from Intel 4 to Intel 3. These are high volume notebooks primarily sold in enterprise setting (like for office jobs that don't need lot of compute. i.e. browsing internet, MS office & emailing etc).
<5% of Intel CHIPS (or die) are made in Intel 3 in 2025. please just count the chips sold. its really not even that close.

Most Arrow lake is not the renamed Meteor Lake, Intel doesnt sell any clearwater forest or Diamond rapids in 2025.... SF and GR volume is quite low. panther lake is paper launching in 2025. 5% of EUV wafers includes TD... yada yada yada.

No need to argue, it will all be changed soon. 2026 Ramp plans might not be what is expected. the updated roadmap will be officially reported out by the end of the year. roadmaps are reported to customers in May-June and then they leak out over the next 6 months. I expect to see the updated customer roadmap leaked somewhere by first week in August.
 
Although I do agree the vast majority should run on TSMCN3B, here are the links proving some does run on Intel 3:

One thing to note: These are all 2P core only products. They really seem to be aimed at replacing the laptops in the lowest end of the market, where Intel margins would be the thinnest, all 2+8+2 cores that give 14 threads. Could be a significant % of Arrow Lake volume in the far future once the rest of Arrow Lake is deramped.


It is VERY deceptive, however - If you look at the 250U series: It's RAPTOR lake...

I do wonder how things are broken out. I guess that's how their branding is, with Core Series 2 being raptor lake and Core Ultra Series 2 being Arrow Lake.

EDIT - after digging around, even though some are on sale, these don't seem to be everywhere so definitely not in significant enough volumes yet to be worth considering - though you should look out though as I do think that Intel will begin trying to move over to Intel 3 because of their commitments with Brookfield/Apollo in Ireland requiring them to fill the fab - and the improved margins w/ Intel 3 also should help. We're only starting to see true MTL volume now so I'd give them until at least December to see if these products are duds or meant to long-term fill the old celeron/ultra low-end niche.
yes, seems like arrow lake should be arrow lake architecture. Intel had mixed up architectures within a generation (RLR example as well).
 
Intel makes <%5 of its processors on Intel 3. Intel chose TSMC 3 for its "3nm" products. No external company is using Intel 3 or 4.
Back in Jan 2023, PG had said that Intel 3 had a "leading cloud, edge, and datacenter solutions provider" as a customer. https://www.tomshardware.com/news/intel-ifs-lands-3nm-to-make-3nm-chips-for-major-customer That did not happen apparently as it was not mentioned in 2024: https://community.intel.com/t5/Blog...dry-Node-with-Intel-3-Technology/post/1607454
 
Back in Jan 2023, PG had said that Intel 3 had a "leading cloud, edge, and datacenter solutions provider" as a customer. https://www.tomshardware.com/news/intel-ifs-lands-3nm-to-make-3nm-chips-for-major-customer That did not happen apparently as it was not mentioned in 2024: https://community.intel.com/t5/Blog...dry-Node-with-Intel-3-Technology/post/1607454
Yes. Intel made a lot of announcements about customers. Intel has been nice enough to keep all those public statements on their website.

Has Intel taped out a 3rd party product yet? It is now 4 years since Intel announced being a foundry and announcing customers.
 
Back in Jan 2023, PG had said that Intel 3 had a "leading cloud, edge, and datacenter solutions provider" as a customer. https://www.tomshardware.com/news/intel-ifs-lands-3nm-to-make-3nm-chips-for-major-customer That did not happen apparently as it was not mentioned in 2024: https://community.intel.com/t5/Blog...dry-Node-with-Intel-3-Technology/post/1607454
I think that was referring to the custom Xeon 6 agreement with Amazon along with a 18A fabric chip which was later announced.
Has Intel taped out a 3rd party product yet? It is now 4 years since Intel announced being a foundry and announcing customers.
1750344438344.png
 
Does the Backside power delivery portion of Intel 18A use DUV or EUV?

The chart below implies less EUV equipment may be needed to fab chips, but doesn't talk about what's required outside of M0-M2 (which I presume are still traditional top-side layers).

View attachment 3292
I read this finally as less single exposure EUV for M0-M2 layers for 18A compared to Intel 3 (?) Power rail pitch should be cell height (160 nm?) so dry DUV could even do that.
 
I read this finally as less single exposure EUV for M0-M2 layers for 18A compared to Intel 3 (?) Power rail pitch should be cell height (160 nm?) so dry DUV could even do that.
Less single exposure 😅 and yes I was surprised vs I3 looks like it will be only slightly more expensive than I3 to produce 🤣
 
I think that was referring to the custom Xeon 6 agreement with Amazon along with a 18A fabric chip which was later announced.

View attachment 3295
Yeah - this audience occasionally forgets the 16nm and 12nm UMC stuff. But customer wafers running through more mature nodes using fully depreciated fabs is a key part of TSMCs financial equation. We'll see if the same can buoy Intel Foundry.
 
Yeah - this audience occasionally forgets the 16nm and 12nm UMC stuff. But customer wafers running through more mature nodes using fully depreciated fabs is a key part of TSMCs financial equation. We'll see if the same can buoy Intel Foundry.
there is no 12 revenue yet (Intel has shown the 12 plan). 16 revenue is minimal at this point (intel reports out external revenue, we have model to break components of external)

I am there was a tapeout on 16. There are Lots of plans... but we need to track tapeouts like we do for TSMC.
 
Less single exposure 😅 and yes I was surprised vs I3 looks like it will be only slightly more expensive than I3 to produce 🤣
Perhaps we should wait to see what happens when 18A is actually running before we assume the cost.... we are foresee-ing some "unforeseen costs associated with 18A" that will be reported by Intel in Q1 2026. Also the outs/tool may or may not be on track for 18A.
 
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