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Truechip’s DisplayPort 2.0 Verification IP (VIP) Solution

Truechip’s DisplayPort 2.0 Verification IP (VIP) Solution
by Kalar Rajendiran on 04-21-2022 at 10:00 am

Integrating IP to build SoCs has been consistently on the rise. Growth in complexity and meeting time to market pressures are some primary drivers behind this phenomenon. Consequentially, the IP market segment has also been enjoying tremendous growth. While this is great news for chip design schedules, it does highlight the increased demand for quick, easy and accurate verification. Without a time and cost efficient way to verify an IP solution, the cost of verifying can end up being higher than the cost of developing the IP itself. And an SoC’s development schedule would be adversely impacted. Naturally, the Verification IP (VIP) segment of the IP market has seen high growth rates.

There are IP verification solutions offered by a number of companies. One company that was introduced in late 2020 to the SemiWiki audience is Truechip. Founded in 2008, Truechip characterizes itself as the Verification IP Specialist. It offers an extensive portfolio of VIP solutions to verify IP components interfacing with industry-standard protocols integrated into ASICs, FPGAs and SoCs.

Salient Aspects of Truechip’s VIP Solutions

Truechip’s Verification IPs are fully compliant to standard specifications and come with an easy plug-and-play interface to enable a rapid development cycle. The VIPs are highly configurable by the user to suit the verification environment. They also support a variety of error injection scenarios to help stress test the device under test (DUT). Their comprehensive documentation includes user guides for various scenarios of VIP/DUT integration. Truechip’s VIP solutions work with all industry-leading dynamic and formal verification simulators. The solutions also include Assertions that can be used in formal and dynamic verification as well as with emulations.

And their solutions come with the TruEYE GUI-based tool that makes debugging very easy. This patented debugging tool reduces debugging time by up to 50%.

Truechip TruEYE GUI

Truechip’s DisplayPort 2.0 VIP Solution

One interface IP that is gaining lot of attention these days is the DisplayPort IP. Truechip has been supporting the Display market segment with VIP solutions for HDMI, HDCP and DisplayPort. They recently expanded their portfolio with the addition of DisplayPort 2.0 VIP solution. Their DisplayPort 1.4 VIP has a long track record within the customer base. Their DisplayPort 2.0 VIP has brought lot of upgrades to keep up with the enhancements from DisplayPort 1.4 to 2.0. The following Figure depicts a block diagram of the corresponding VIP environment.

Truechip DP VIP Environment

The DisplayPort 2.0 VIP is fully compliant with Standard DisplayPort Version 2.0 specifications from VESA. Nonetheless, it is a light weight VIP with easy plug-and -play interface for a rapid design cycle and reduced simulation time. The solution is offered in native System Verilog (UVM/OVM/ VMM) and Verilog, with availability of compliance and regression test suites.

Some Salient Features of Truechip’s DisplayPort 2.0 VIP Solution

  • Supports High Bandwidth Digital Content Protection System Version 1.4, 2.2 and 2.3.
  • Supports Multi-Stream Transport (MST)
  • Supports Link Training(LT) Tunable PHY Repeaters (LTTPR)
  • Supports Reed-Solomon Forward Error Correction RS(254,250)
  • Supports multi lane configuration (up to 4 lanes)
  • Supports DSC v1.2a (Compressed Display Stream Transport Services)
  • Supports DisplayPort Configuration Data (DPCD) version 1.4
  • Support of legacy EDID is provided
  • Supports I2C over AUX Channel and Native AUX
  • Supports dynamically configurable modes.
  • Supports Dynamic as well as Static Error Injection scenarios.
  • On the fly protocol checking using protocol check functions, static and dynamic assertions
  • Built in Coverage analysis.
  • TruEYE GUI analyzer tool to show transactions for easy debugging

Deliverables

  • DisplayPort 2.0 BFMs for:
    • Source – Link Layer
    • Source – MAC Layer
    • Source – PHY Layer
    • Sink – Link Layer
    • Sink – MAC Layer
    • Sink – PHY Layer
    • Branching Devices
  • DisplayPort layered monitor & scoreboard
  • Test Environment & Test Suite :
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
    • Compliance Test Suite
    • User Test Suite
  • Integration guide, user manual, and release notes
  • TruEYE GUI analyzer to view simulation packet flow

About Truechip

Truechip, the Verification IP specialist, is a leading provider of Design and Verification solutions. It has been serving customers for more than a decade. Its solutions help accelerate the design cycle, lowers the cost of development and reduces the risks associated with the development of ASICs, FPGAs and SoCs. The company has a global footprint with sales coverage across North America, Europe and Asia. Truechip provides the industry’s first 24×5 support model with specialization in VIP integration, customization and SoC Verification.

For more information, refer to Truechip website.

Also Read:

Bringing PCIe Gen 6 Devices to Market

PCIe Gen 6 Verification IP Speeds Up Chip Development

USB4 Makes Interfacing Easy, But is Hard to Implement

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