I recently watched a webinar titled “How to accelerate power-aware simulation debug with Synopsys’ VC LP” that was presented by Ashwani Kumar Dwivedi senior applications engineer at Synopsys. Watching the webinar made me reminisce how design verification has evolved over the years. A long time ago, static verification started… Read More
Author: Kalar Rajendiran
Techniques and Tools for Accelerating Low Power Design Simulations
The Five Pillars for Profitable Next Generation Electronic Systems
Although electronic systems design as a discipline has been around ever since electronics systems came into existence (and that was many decades ago), the design complexities involved and the demands and constraints placed on the systems have multiplied significantly since then. Recent research by LifeCycle Insights shows… Read More
Chip in the Clouds – “Precipitation”
Since around the posting of my prior blog [Chip in the Clouds – “Gathering”] to now many events have taken place. Facebook announced its intent to acquire Instagram for $1B in cash and stock, completed its initial public offering, announced an Instagram competitive product by releasing “Facebook Camera” … Read More
Chip in the Clouds – "Gathering"
Cloud computing is the talk of the tech world nowadays. I even hear commentaries about how entrepreneurs are turned down by venture capitalists for not including a cloud component into their business plan no matter what the core business may be. The commentary goes “It’s cloudy without any clouds.” Add some clouds to your strategy… Read More
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ISS 2021 – Scotten W. Jones – Logic Leadership in the PPAC era