When I think of verification IP (VIP), I think of something closely tied to a protocol standard – AMBA, MIPI or DDR for example. Something that will generate traffic and run protocol compliance checks, to verify correct operation of an IP or as a model to use in SoC verification. What would a VIP for systems be? Systems support multiple… Read More
In the technology industry, we’re all used to the hype about the latest and greatest. Semiconductor IP participates in the over-drive news cycle from time to time as well. So, when I see a company that has real, solid credentials but has resisted the temptation to over-hype, it gets my attention. I had an experience like this recently… Read More
I am sure there are many FPGA designers who are quite content to rely on hardware vendor tools to define, check, implement and burn their FPGAs, and who prefer to test in-system to validate functionality. But that approach is unlikely to work when you’re building on the big SoC platforms – Zynq, Arria and even the big non-SoC devices.… Read More
There seems to be a general sense that we have the foundations for block/IP verification more or less under control, thanks to UVM standardizing infrastructure for directed and constrained-random testing, along with class libraries providing building blocks to simplify verification reuse, build sequence tests, verify register… Read More
Once upon a time the role of electricity in a car was pretty modest: spark plugs, alternator, lighting, some simple instrumentation and maybe heating, all supported by an equally simple wiring harness (my wife has a 1962 Morris Minor, so I know exactly what the whole wiring harness looks like). How times have changed. Now most or … Read More
In the first part of this article I wrote about four types of costs which must be considered when an IP goes through design differentiation, customization, characterization, and selection and evaluation for acquisition. In this part of the article, I will discuss about the other five types of costs which must be considered to enhance… Read More
Last week I woke up late as usual and decided to flip through the news paper on Coffee to enjoy the lazy Sunday morning, but I ended up reading a sad news about a train accident. Everyday virtually we hear about minimum one accident. Indian Railways, wow, what a reliable transportation system we have built. It clearly indicates we have… Read More
SmartDV started as a small setup in Bangalore in 2008 and by now is one of the most respectable VIP (Verification IP) companies in the world. Having a portfolio of 83 VIPs in its kitty and growing, it has a large customer base, including the top semiconductor companies around the world. The company has grown significantly and is raring… Read More
As we are aware about SmartDV Technologies, a fast emerging company in IP space with offices in Bangalore and San Diego, its booth in 52ndDACwas located at a prominent position in front of DAC Pavilion on the exhibits floor. So, most of the crowd coming to attend sessions in DAC Pavilion had a glimpse of SmartDV. I met Deepak Kumar Tala… Read More
With growing complexities and sizes of SoCs, verification has become a key challenge for design closure. There isn’t a single methodology that can provide complete verification closure for an SoC. Moreover creation of verification environment including hardware, software, testbench and testcases requires significant … Read More
